Emerson MVME2500 manual Other Software Considerations, Mram, Quad Uart, TSEC3

Programming Model

Table 7-4 PHY Types and MII Management Bus Address

			PHY MIIM
Ethernet Port	Function / Location	PHY Types	Address
TSEC2	Gigabit Ethernet port routed to front or back panel,	BCM54616	7
	set by GBE_MUX_SEL in S2
TSEC3	Gigabit Ethernet port routed to back panel	BCM54616	3

7.6Other Software Considerations

This section provides programming information in relation to various board components.

7.6.1MRAM

The MVME2500 provides 512 K bytes of fast, non-volatile storage in the form of Magnetoresistive Random Access Memory (MRAM). The MRAM is directly accessible by software using processor load and store instructions similar to the DRAM. The difference is that the MRAM retains its contents even if the board is power cycled. The MRAM is accessed through the LBC.

7.6.2Real Time Clock

The MVME2500 provides a battery backed-up DS1375 Real Time Clock (RTC) chip. The RTC chip provides time keeping and alarm interrupts. It is an I2C device and is accessed through the I2C bus address at 0x68.

7.6.3Quad UART

The MVME2500 console RS232 port is driven by the UART built into the P20x0 QorIQ chip. Additionally, the MVME2500 has a Quad UART chip which provides four additional 16550 compatible UART. These additional UART are internally accessed through the LBC bus. The Quad UART chip clock input (which is internally divided to generate the baud rate) is 1.8432 MHz. The four UART physically connect to RS232 DB9 serial ports through the RTM.

MVME2500 Installation and Use (6806800L01H) 119