Bootb Boots, Locka | Emerson MVME2500 manual

Memory Maps and Registers

Table 5-13 PLD Boot Bank Register

REG		PLD Boot Bank - 0xFFDF0050

Field		SPI_GOODReg							BOOT_B	BOOT_S
		(write 0xA4 into this reg to indicate successful loading of the U-							LOCK_A	PI

		Boot.

OPER		R/W							R	R

RESET		0	0		0	0	0	0	X	0

Field Description
BOOT_BLOCK_A			Boot Block Manual Selector Switch
			1	- SPI0
			0	- SPI1
BOOT_SPI			Actual Boot Bank
			1	- SP1
			0	- SPI0

90	MVME2500 Installation and Use (6806800L01H)

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Emerson MVME2500 manual Bootb Boots, Locka

Contents

MVME2500 Contact Address Contents Contents Contents Memory Maps and Registers Emerson Network Power Embedded Computing Documents Safety Notes Sicherheitshinweise Index List of Tables List of Tables List of Figures Figure A-1 List of Figures Overview of Contents About this ManualAbbreviations About this Manual Vita ConventionsUSB VME About this Manual About this Manual Summary of Changes Documentation, on Key Features of the MVME2500 IntroductionOverview Introduction KB Mram 8 KB VPD Eeprom Standard Compliances Board Standard Compliances Mechanical Data Mechanical DataOrdering Information Available Board Variants VME-64GBSSDKIT Available Board AccessoriesVME-HDMNTKIT SERIAL-MINI-D Product Identification Serial Number Location Hardware Preparation and Installation Hardware Preparation and Installation Unpacking and Inspecting the BoardRequirements Environmental Requirements Environmental RequirementsGrms Power Requirements Power Requirements Configuring the Board Equipment Requirements Installing Accessories Rear Transition Module Installation Procedure 2 PMC/XMC Support Installing and Removing the Board Hardware Preparation and Installation Completing the Installation Controls, LEDs, and Connectors Board Layout Controls, LEDs, and Connectors Front Panel Reset Switch LEDsFront Panel LEDs GENET1 TSEC1 UserFail Speed Connectors Onboard LEDsOnboard LEDs Status Front Panel Connectors Front Panel Tri-Speed Ethernet Connector J11.1 RJ45 with Integrated Magnetics J1 Front Panel Serial Port J4 Front Panel Serial Port J4 USB Connector J5 Controls, LEDs, and Connectors USB Connector J5VMEBus P1 Connector VMEbus P1 Connector GA3 Dtack DS0 BR1 Lword GA2 Write BR2GND BR3 GA4 Controls, LEDs, and Connectors VMEBus P2 Connector VMEbus P2 Connector Onboard Connectors Flash Program Connector P7Flash Programming Header P7 GND Sata Power Enable Sata TX + Sata Detect Sata Connector J3Custom Sata Connector J3 Sata RX PMC Connectors 10 PMC J11 Connector 11 PMC J12 Connector 12 PMC J13 Connector GND CBE7 CBE6 CBE5 CBE4 PAR64 13 PMC J14 Connector Jtag Connector P6 14 Jtag Connector P6 Scan 3 TCK GPO0 Scan 2 TMS Scan 2 TDO Scan 2 TCKGND Scan 2 TDI Scan 3 TMS Scan 3 TCK1 Scan 3 TDO GND Scan 4 TDI Scan 4 TCK Scan 4 Trst Scan 5 TMS Scan 5 TDO 16 SD Connector J2 Controls, LEDs, and Connectors COP Connector P6SD Connector J2 15 COP Header P10 XMC Connector XJ2 17 XMC Connector XJ2 Pinout Miscellaneous P2020 Debug Connectors 18 P20x0 Debug Header Switches Geographical Address Switch S1Trigin MSRCID4 GND GAP3 VME Scon SEL2GAP4 GAP2 SMT Configuration Switch S2 Gbemuxsel MasterwpdisaBled Plane Block Diagram Functional DescriptionChipset 1 e500 Processor Core Integrated Memory ControllerFunctional Description Secure Digital Hub Controller Sdhc PCI Express InterfaceLocal Bus Controller LBC 6 I2C Interface Enhanced Three-Speed Ethernet Controller eTSEC DuartDMA Controller General Purpose I/O Gpio System Memory Timers14 P20x0 Hardware Configuration Pins Common On-Chip Processor COP Fpga Tick Timer Internal TimerWatchdog Timer Ethernet Interfaces SPI Bus Interface SPI Flash MemorySPI Flash Programming Firmware Redundancy SPI Device Multiplexing Logic Crisis Recovery Front Uart Control Rear Uart Control PMC/XMC Sites Sata Interface PMC Add-on CardXMC Add-on Card 13 I2C Devices VME Support12 USB 11.1 Tsi148 VME Controller Onboard Voltage Supply Requirement Reset/Control FpgaPower Management Voltage Supply Requirement Power Up Sequencing Requirements Reset Structure Clock Structure Thermal Management Real-Time Clock BatteryReset Sequence Thermal Interrupt Threshold Debugging Support Post Code IndicatorPost Code Indicator on the LED Jtag Chain and Board Custom Debugging Transition Module FeaturesRear Transition Module RTM SBC Functional Description Memory Maps and Registers Memory MapPhysical Address Map Memory Maps and Registers Flash Memory MapLinux Devices Memory Map Flash Memory Map Linux Devices Memory Map PLD Year Register Programmable Logic Device PLD RegistersPLD Revision Register PLD Revision Register PLD Month Register PLD Day RegisterPLD Sequence Register Wrgd RGD Pwrg Oper Reset PLD Power Good Monitor RegisterPLD Power Good Monitor Register Rsvd Pwrv PLD LED Control Register 10 PLD LED Control RegisterPWRV1P2SWPWRG PLD PCI/PMC/XMC Monitor Register 11 PLD PCI/PMC/XMC Monitor RegisterPMC1PN 12 PLD U-Boot and TSI Monitor Register PLD U-Boot and TSI Monitor RegisterPLD Boot Bank Register 13 PLD Boot Bank Register Bootb Boots Locka 14 PLD Write Protect and I2C Debug Register Wpdi WPN Ugen Flash Sabled Oper ResetPLD Write Protect and I2C Debug Register Rsvd Master Flash I2CDEB Serial I2CDEBUGEN=0 PLD Test Register 15 PLD Test Register16 PLD Test Register Rsvd NMI TICK0INT TICK1INT TICK2INT Oper Reset PLD GPIO2 Interrupt Register17 PLD GPIO2 Interrupt Register Cpureset Wdtime Lrsto PLD Shutdown and Reset Control and Reset Reason Register18 PLD Shutdown and Reset Control and Reset Reason Register Dnmask OUT Oper Reset PLD Watchdog Timer Refresh Register 19 PLD Watchdog Timer Refresh Register PLD Watchdog Control Register PLD Watchdog Timer Count Register21 PLD Watchdog Timer Count Register 20 PLD Watchdog Control Register External Timer Registers Prescaler Register22 Prescaler Register 23 Control Registers COC ENC Oper ResetControl Registers Ints Cint Compare High and Low Word Registers 24 Compare High Word Registers25 Compare Low Word Registers Counter High and Low Word Registers 26 Counter High Word Registers27 Counter Low Word Registers 102 Boot System Accessing U-Boot Boot Options Booting from a NetworkBoot System Booting from an Optional Sata Drive Booting from a USB Drive Booting from an SD Card Booting VxWorks Through the Network Using the Persistent Memory Feature Analyzing Kernel Log Files after a Kernel Panic MVME2500 Specific U-Boot Commands MVME2500 Specific U-Boot Commands Boot System Updating U-Boot Sf probe 112 Reset Configuration POR Configuration SettingsProgramming Model Programming Model Ecmdc Config Config Pins Selection Remarks ETSEC2 Sgmii LGPL1ETSEC3 Sgmmi TSEC1588ALARM ETSEC1 TSEC1TXD0 LWE1/LBS1 Config Config Pins Selection Remarks Boot ROMTSEC1TXER TSEC2TXER Interrupt Controller MVME2500 Interrupt List I2C Bus Device Addressing I2C Bus Device AddressingEthernet PHY Address PHY Types and MII Management Bus Address Quad Uart Other Software ConsiderationsMram TSEC3 LBC Timing Parameters LBC Timing Parameters Clock Distribution Clock Distribution System Clock System Clock Real Time Clock Input Local Bus Controller Clock Divisor 124 Replacing the Battery Replacing the Battery Replacing the Battery Replacement Procedure 128 Emerson Network Power Embedded Computing Documents Related Documentation Manufacturers’ Documents Related SpecificationsTable B-3 Related Specifications Related Documentation PCI-SIG SATA-IO 132 Safety Notes EMC Results pending testing Installation Safety NotesOperation Cabling and Connectors Battery Sicherheitshinweise Betrieb Sicherheitshinweise 139 Kabel und Stecker Batterie Umweltschutz 142 Index Index Page HOW to Reach Literature and Technical Support