Mstr, Diow, Stop, Dior, Hdmardy | Fujitsu MHU2100AT manual

Interface

[signal]	[I/O]		[Description]
ENCSEL	I	This signal is used to set master/slave using the CSEL signal (pin 28).
		Pins B and D Open: Sets master/slave using the CSEL signal is
			disabled.
			Short: Sets master/slave using the CSEL signal is
			enabled.
MSTR-	I	MSTR, I, Master/slave setting
		Pin A, B, C, D open: Master setting
		Pin A, B Short:	Slave setting
PUS-	I	When pin C is grounded, the drive does not spin up at power on.
RESET-	I	Reset signal from the host. This signal is low active and is asserted
		for a minimum of 25 ∝ s during power on.
DATA 0-15	I/O	Sixteen-bit bi-directional data bus between the host and the device.
		These signals are used for data transfer
DIOW-	I	Signal asserted by the host to write to the device register or data port.
STOP	I	DIOW- must be negated by the host before starting the Ultra DMA
		transfer. The STOP signal must be negated by the host before data is
		transferred during the Ultra DMA transfer. During data transfer in
		Ultra DMA mode, the assertion of the STOP signal asserted by the
		host later indicates that the transfer has been suspended.
DIOR-	I	Read strobe signal from the host to read the device register or data
		port
HDMARDY-	I	Flow control signal for Ultra DMA data In transfer (READ DMA
		command). This signal is asserted by the host to inform the device
		that the host is ready to receive the Ultra DMA data In transfer. The
		host can negate the HDMARDY- signal to suspend the Ultra DMA
		data In transfer.
HSTROBE	I	Data Out Strobe signal from the host during Ultra DMA data Out
		transfer (WRITE DMA command). Both the rising and falling edges
		of the HSTROBE signal latch data from Data 15-0 into the device.
		The host can suspend the inversion of the HSTROBE signal to
		suspend the Ultra DMA data Out transfer.
INTRQ	O	Interrupt signal to the host.
		This signal is negated in the following cases:

−

−

−

−

−

assertion of RESET- signal

Reset by SRST of the Device Control register

Write to the command register by the host

Read of the status register by the host

Completion of sector data transfer

(without reading the Status register)

The signal output line has a high impedance when no devices are selected or interruption is disabled.

5-4	C141-E202-01EN

Image 80

Fujitsu MHU2100AT manual Mstr, Diow, Stop, Dior, Hdmardy

Contents

MHU2100AT Disk Drive Product Manual For Safe Operation Handling of This Manual Revision History This page is intentionally left blank Preface Overview of Manual Conventions Conventions for Alert MessagesOperating Environment Liability Exception This page is intentionally left blank Important Alert Items Important Alert Messages This page is intentionally left blank MHU2100AT Disk Drive Product Manual MHU2100AT Disk Drive Maintenance ManualManual Organization This page is intentionally left blank Contents Installation Conditions Theory of Device Operation Contents Interface 100 120 Operations Glossary GL-1 Acronyms and Abbreviations AB-1 Index IN-1 Illustrations Figures Execution example of Read Multiple command Surface temperature measurement points and standard Tables 25 Relationship between combination of Identifier This page is intentionally left blank Device Overview Adaptability FeaturesFunctions and performance Error correction and retry by ECC Connection to ATA interfaceData buffer Read-ahead cache system Specifications 1 Device SpecificationsSpecifications summary Specifications 2 Model and product numberMHU2100AT Examples of model names and product numbers Ripple Power RequirementsInput Voltage Current and power dissipation Environmental Specifications Current fluctuation Typ. at +5 V when power is turned onPower on/off sequence Environmental specifications Acoustic noise specification Shock and vibration specificationAcoustic Noise Shock and Vibration Service life Data assurance in the event of power failureReliability Mean time between failures Mtbf Error Rate Unrecoverable read errorPositioning error Media Defects Advanced Power Management Advanced Power Management Advanced Power Management This page is intentionally left blank Device Configuration Device Configuration System Configuration ATA interface2 1 drive connection Read/write circuit 2 drives configuration 3 2 drives connection Installation Conditions Dimensions Dimensions Orientation MountingIntegration Guidance C141-E144 PCA FrameLimitation of mounting Location of breather Ambient temperature Service area Handling cautions Handling cautions Device connector Cable Connections Cable connector specifications Cable connector specificationsDevice connection FCI Location of setting jumpers Jumper SettingsPower supply connector CN1 Factory default setting Master drive-slave drive setting Csel setting 14 Csel setting Power Up in Standby setting 16 Example 2 of Cable Select Theory of Device Operation Outline SubassembliesDisk Spindle Circuit Configuration Air filterServo circuit Spindle motor driver circuit Power Supply Configuration PCA Power-on Sequence Power-on operation sequence Self-calibration contents Self-calibration Command processing during self-calibration Execution timing of self-calibration Read/write Circuit Read/write preamplifier PreAMPWrite circuit RLL code Meeprml Programmable filter circuit Read circuitAGC circuit Digital PLL circuit FIR circuitD converter circuit Viterbi detection circuit Servo Control Servo control circuit Power amplifier Microprocessor unit MPUServo burst capture circuit A converter DAC VCM current sense resistor CSR Spindle motor control circuitDriver circuit Data-surface servo format Inner guard bandData area Outer guard band Physical sector servo configuration on disk surface Servo frame format Actuator motor control Operation to move the head to the reference cylinderSeek operation Track following operation Start mode Acceleration modeStable rotation mode Spindle motor control Theory of Device Operation Interface Interface signals Physical Interface Signal assignment on the connector Signal assignment on the interface connectorDA1 PDIAG-, Cblid DA0 DA2 Dasp GND Mstr DiowStop Dior Pdiag CblidDasp Iordy Logical Interface DA2 DA1 DA0 1 I/O registersI/O registers Command block registers Error register X’1F1’Data register X’1F0’ UNC Idnf Sector Count register X’1F2’ Features register X’1F1’SET Multiple Mode Cylinder High register X’1F5’ Sector Number register X’1F3’Cylinder Low register X’1F4’ Device/Head register X’1F6’ DEV HS3 HS2 HS1 HS0Status register X’1F7’ BSY Interface Alternate Status register X’3F6’ Command register X’1F7’Control block registers Host Commands Command code and parametersDevice Control register X’3F6’ HOB Srst Parameter Used Command code and parameters 1Command Name Command code and parameters 2 EXT Flush Cache EXT Host Commands Command descriptions Host Commands Recalibrate X’10’ to X’1F’ Read Sectors X’20’ or X’21’ MSB End head No. / LBA MSB Read Long X’22’ or X’23’ Write Sectors X’30’ or X’31’ 1F7 HST Status information 1F6 HDH Write Long X’32’ or X’33’ Write Verify X’3C’ Read Verify Sectors X’40’ or X’41’ Seek X’70’ to X’7F’ Execute Device Diagnostic X’90’ Diagnostic code Host Commands Initialize Device Parameters X’91’ Download Micro Code X’92’ Operation of Download Micro Code Standby Immediate X’94’ or X’E0’ Idle Immediate X’95’ or X’E1’ Standby X’96’ or X’E2’ Idle X’97’ or X’E3’ Host Commands Check Power Mode X’98’ or X’E5’ ’FF’ Sleep X’99’ or X’E6’ Smart X’B0 Features Register values subcommands and functions 1 Features Register values subcommands and functions 2 Smart Enable OperationsSmart Disable Operations Smart Read LOG ’DA’ Smart Return Status Features Register values subcommands and functions 3Smart ENABLE/DISABLE Auto OFF-LINE Interface Format of insurance failure threshold value data Format of device attribute value data1FF Data format version number Attribute ID Status Flag Current attribute valueAttribute value for the worst case so far Raw attribute value 11 Self-test execution status 10 Off-line data collection statusSelf-test execution status Off-line data collection capability 12 Off-line data collection capabilityFailure prediction capability flag 13 Failure prediction capability flag Error logging capability 14 Error logging capabilityCheck sum Insurance failure threshold Smart error logging 16 Data format of Smart Summary Error Log Command data structure Error data structureTotal number of drive errors 17 Data format of Smart Comprehensive Error Log Smart Self-Test 18 Smart self-test log data format1FC Self-test number 19 Selective self-test log data structure Test SpanCurrent LBA under test Current Span under test Selective Self-test pending time min Feature Flags20 Selective self-test feature flags Device Configuration XB1 Device Configuration RestoreDevice Configuration Freeze Device Configuration Identify Device Configuration Restore FR = C0h Device Configuration Freeze Lock FR = C1hDevice Configuration Identify FR = C2h Device Configuration SET FR = C3h Host Commands 21 Device Configuration Identify data structure Execution example of Read Multiple command Read Multiple X’C4’ MSB Write Multiple X’C5’ Interface SET Multiple Mode X’C6’ Interface Read DMA X’C8’ or X’C9’ End head No. / LBA MSB Write DMA X’CA’ or X’CB’ Interface Read Buffer X’E4’ Flush Cache X’E7’ Write Buffer X’E8’ Identify Device X’EC’ Identify Device DMA X’EE’ 22 Information to be read by Identify Device command 1 ’3FFF’ 22 Information to be read by Identify Device command 2 Word Command without interrupt supports 2, 4, 8 and 16 sectors = Supports the Host Protected Area feature set = Supports the CFA Compact Flash Association feature set Interface Host Commands Diagnosis Word Bit Reserved Security level High, 1 Maximum SET Features X’EF’ 23 Features register values and settable modes’AA’ ’BB’ Data Transfer Mode Advanced Power Management APM Automatic Acoustic Management AAM 24 Contents of Security SET Password data At command issuance I-O register contents 1F7 hCM 1F6 hDH Security UNLOCKX’F2’ When the master password is selectedWhen the user password is selected Host Commands Security Erase Prepare X’F3’ Security Erase Unit X’F4’ Security Freeze Lock X’F5’ At command issuance I-O register contents 1F7 hCM 1F6 hDH 26 Contents of security password Host Commands Read Native MAX Address X’F8’ SET MAX X’F9’ SET MAX Address SET MAX SET Password FR = 01h SET MAX Lock FR = 02h SET MAX Unlock FR = 03h SET MAX Freeze Lock FR = 04h Interface Read Sectors EXT X’24’ Option customizing Description Read DMA EXT X’25’ Option customizing Description HOB=1 Error reporting conditionsHOB=0 Read Multiple EXT X’29’ Option customizing Description Read LOG EXT X2F Optional command Customize Description Interface Write Sectors EXT X’34’ Option customizing Description Write DMA EXT X’35’ Option customizing Description SET MAX Address EXT X’37’ Option customizing Description SET MAX LBA Write Multiple EXT X’39’ Option customizing Description Write LOG EXT X’3F’ Optional command Customize Description Host Commands Read Verify Sectors EXT X’42 Option customizing Description Flush Cache EXT X’EA’ Option customizing Description Error posting 27 Command code and parameters 1 27 Command code and parameters 2 Execute Device Diagnostic Initialize Device Parameters Command ProtocolPIO Data transferring commands from device to host Read Sectors Command protocol Protocol for command abort PIO Data transferring commands from host to device Write Sectors command protocol Commands without data transfer Other commands DMA data transfer commandsRead Multiple EXT Write Multiple EXT Sleep Read DMA EXT Write DMA EXT Indentify Device DMA Normal DMA data transfer Ultra DMA Feature Set Overview Initiating an Ultra DMA data in burst Phases of operationUltra DMA data in commands Pausing an Ultra DMA data in burst Data in transfer Terminating an Ultra DMA data in burst Interface Ultra DMA Feature Set Ultra DMA data out commands Initiating an Ultra DMA data out burst Pausing an Ultra DMA data out burst Data out transfer Terminating an Ultra DMA data out burst Ultra DMA Feature Set Ultra DMA CRC rules Series termination required for Ultra DMA 28 Recommended series termination for Ultra DMADIOR-HDMARDY-HSTROBE DIOW-STOP PIO data transfer timing TimingPIO data transfer 10 Multiword DMA data transfer timing mode Multiword data transfer Ultra DMA data transfer 11 Initiating an Ultra DMA data in burst Name Mode Comment Strobe 29 Ultra DMA data burst timing requirements 2 MIN MAX Mode Name Comment 30 Ultra DMA sender and recipient timing requirements Sustained Ultra DMA data in burst Dstrobe at deviceDD150 at device Dstrobe at host DD150 at host Host pausing an Ultra DMA data in burst DmarqDmack Stop Device terminating an Ultra DMA data in burst DA0, DA1, DA2 CS0, CS1 Host terminating an Ultra DMA data in burstHost 16 Initiating an Ultra DMA data out burst Hstrobe at device DD150 at device Sustained Ultra DMA data out burstHstrobe at host DD150 at host Hstrobe host DD150 Host Device pausing an Ultra DMA data out burstDevice DMACK- host Stop host DDMARDY- device Host terminating an Ultra DMA data out burst 19 Host terminating an Ultra DMA data out burst DD150 Host Device terminating an Ultra DMA data out burstDmarq device DMACK- host Only master device is present Power-on and resetMaster and slave devices are present 2-drives configuration This page is intentionally left blank Operations Device Response to the Reset Response to power-on Response to hardware reset Response to power-on Response to hardware reset Response to software reset Response to software reset Response to diagnostic command Response to diagnostic command Power Save Power save modeActive mode Active idle mode Standby mode Sleep mode Spare area Power commandsDefect Processing Track slip processing Alternating processing for defective sectorsSector slip processing Automatic alternating processing Automatic alternating processing Read-ahead Cache Data buffer structure8MB buffer 8,388,608 bytes Read Sectors EXT Read Multiple EXT Read DMA EXT Commands that are targets of caching Caching operationRead Multiple EXT Read Dmaext Data that is a target of caching Operations Using the read segment buffer Miss-hit Sequential Hit Full hit Partial hit Command that are targets of caching Write CacheCache operation Invalidation of cached data Status report in the event of an error Reset responseCashing function when power supply is turned on Enabling and disabling Write Cache This page is intentionally left blank Glossary Power save mode Rotational delayPIO Programmed input-output Positioning Status VCM This page is intentionally left blank Acronyms and Abbreviations This page is intentionally left blank Index AAM Index Information to be read by Identify Read Sectors Command Read Native MAX Address Surface temperature measurement This page is intentionally left blank Comment Form Japan This page is intentionally left blank C141-E202-01EN This page is intentionally left blank