5.3 Host Commands
(12) STANDBY IMMEDIATE (X’94’ or X’E0’)
Upon receipt of this command, the device sets the BSY bit of the Status register and enters the standby mode. The device then clears the BSY bit and generates an interrupt. This command does not support the APS timer function.
At command issuance (I/O registers setting contents)
1F7H(CM) | X’94’ or X’E0’ |
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1F6H(DH) | x | x | x | DV | xx |
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1F5H(CH) | xx |
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1F4H(CL) | xx |
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1F3H(SN) | xx |
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1F2H(SC) | xx |
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1F1H(FR) | xx |
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At command completion (I/O registers contents to be read)
1F7H(ST) | Status information |
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1F6H(DH) | x | x | x | DV | xx |
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1F5H(CH) | xx |
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1F4H(CL) | xx |
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1F3H(SN) | xx |
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1F2H(SC) | xx |
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1F1H(ER) | Error information |
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