Terminating an Ultra DMA data out burst | Fujitsu MHU2100AT specs

Interface

5.5.4.4Terminating an Ultra DMA data out burst

a)Host terminating an Ultra DMA data out burst

The following stops shall occur in the order they are listed unless otherwise specifically allowed (see 5.6.3.10 and 5.6.3.2 for specific timing requirements):

1)The host shall initiate termination of an Ultra DMA burst by not generating HSTROBE edges.

2)The host shall assert STOP no sooner than tSS after it last generated an HSTROBE edge. The host shall not negate STOP again until after the Ultra DMA burst is terminated.

3)The device shall negate DMARQ within tLI after the host asserts STOP. The device shall not assert DMARQ again until after the Ultra DMA burst is terminated.

4)The device shall negate DDMARDY- with tLI after the host has negated STOP. The device shall not assert DDMARDY- again until after the Ultra DMA burst termination is complete.

5)If HSTROBE is negated, the host shall assert HSTROBE with tLI after the device has negated DMARQ. No data shall be transferred during this assertion. The device shall ignore this transition on HSTROBE. HSTROBE shall remain asserted until the Ultra DMA burst is terminated.

6)The host shall place the result of its CRC calculation on DD (15:0) (see 5.5.5)

7)The host shall negate DMACK- no sooner than tMLI after the host has asserted HSTROBE and STOP and the device has negated DMARQ and

DDMARDY-, and no sooner than tDVS after placing the result of its CRC calculation on DD (15:0).

8)The device shall latch the host's CRC data from DD (15:0) on the negating edge of DMACK-.

9)The device shall compare the CRC data received from the host with the results of its own CRC calculation. If a miscompare error occurs during one or more Ultra DMA bursts for any one command, at the end of the command, the device shall report the first error that occurred (see 5.5.5).

10)The device shall release DDMARDY- within tIORDYZ after the host has negated DMACK-.

11)The host shall neither negate STOP nor negate HSTROBE until at least tACK after negating DMACK-.

12)The host shall not assert DIOW-, CS0-, CS1-, DA2, DA1, or DA0 until at least tACK after negating DMACK.

5-142

C141-E202-01EN

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Fujitsu MHU2100AT manual Terminating an Ultra DMA data out burst

Contents

MHU2100AT Disk Drive Product Manual For Safe Operation Handling of This Manual Revision History This page is intentionally left blank Preface Overview of Manual Conventions Conventions for Alert MessagesOperating Environment Liability Exception This page is intentionally left blank Important Alert Items Important Alert Messages This page is intentionally left blank MHU2100AT Disk Drive Product Manual MHU2100AT Disk Drive Maintenance ManualManual Organization This page is intentionally left blank Contents Installation Conditions Theory of Device Operation Contents Interface 100 120 Operations Glossary GL-1 Acronyms and Abbreviations AB-1 Index IN-1 Illustrations Figures Execution example of Read Multiple command Surface temperature measurement points and standard Tables 25 Relationship between combination of Identifier This page is intentionally left blank Device Overview Adaptability FeaturesFunctions and performance Data buffer Error correction and retry by ECCConnection to ATA interface Read-ahead cache system Specifications 1 Device SpecificationsSpecifications summary MHU2100AT Specifications 2Model and product number Examples of model names and product numbers Ripple Power RequirementsInput Voltage Current and power dissipation Power on/off sequence Environmental SpecificationsCurrent fluctuation Typ. at +5 V when power is turned on Environmental specifications Acoustic Noise Acoustic noise specificationShock and vibration specification Shock and Vibration Reliability Service lifeData assurance in the event of power failure Mean time between failures Mtbf Positioning error Error RateUnrecoverable read error Media Defects Advanced Power Management Advanced Power Management Advanced Power Management This page is intentionally left blank Device Configuration Device Configuration 2 1 drive connection System ConfigurationATA interface Read/write circuit 2 drives configuration 3 2 drives connection Installation Conditions Dimensions Dimensions Orientation MountingIntegration Guidance C141-E144 PCA FrameLimitation of mounting Location of breather Ambient temperature Service area Handling cautions Handling cautions Device connector Cable Connections Device connection Cable connector specificationsCable connector specifications FCI Location of setting jumpers Jumper SettingsPower supply connector CN1 Factory default setting Master drive-slave drive setting Csel setting 14 Csel setting Power Up in Standby setting 16 Example 2 of Cable Select Theory of Device Operation Disk OutlineSubassemblies Spindle Servo circuit Circuit ConfigurationAir filter Spindle motor driver circuit Power Supply Configuration PCA Power-on Sequence Power-on operation sequence Self-calibration contents Self-calibration Command processing during self-calibration Execution timing of self-calibration Write circuit Read/write CircuitRead/write preamplifier PreAMP RLL code Meeprml Programmable filter circuit Read circuitAGC circuit D converter circuit Digital PLL circuitFIR circuit Viterbi detection circuit Servo Control Servo control circuit Servo burst capture circuit Power amplifierMicroprocessor unit MPU A converter DAC VCM current sense resistor CSR Spindle motor control circuitDriver circuit Data area Data-surface servo formatInner guard band Outer guard band Physical sector servo configuration on disk surface Servo frame format Seek operation Actuator motor controlOperation to move the head to the reference cylinder Track following operation Stable rotation mode Start modeAcceleration mode Spindle motor control Theory of Device Operation Interface Interface signals Physical Interface DA1 PDIAG-, Cblid DA0 DA2 Signal assignment on the connectorSignal assignment on the interface connector Dasp GND Stop MstrDiow Dior Dasp PdiagCblid Iordy Logical Interface DA2 DA1 DA0 1 I/O registersI/O registers Data register X’1F0’ Command block registersError register X’1F1’ UNC Idnf Sector Count register X’1F2’ Features register X’1F1’SET Multiple Mode Cylinder High register X’1F5’ Sector Number register X’1F3’Cylinder Low register X’1F4’ Status register X’1F7’ Device/Head register X’1F6’DEV HS3 HS2 HS1 HS0 BSY Interface Alternate Status register X’3F6’ Command register X’1F7’Control block registers Device Control register X’3F6’ Host CommandsCommand code and parameters HOB Srst Parameter Used Command code and parameters 1Command Name Command code and parameters 2 EXT Flush Cache EXT Host Commands Command descriptions Host Commands Recalibrate X’10’ to X’1F’ Read Sectors X’20’ or X’21’ MSB End head No. / LBA MSB Read Long X’22’ or X’23’ Write Sectors X’30’ or X’31’ 1F7 HST Status information 1F6 HDH Write Long X’32’ or X’33’ Write Verify X’3C’ Read Verify Sectors X’40’ or X’41’ Seek X’70’ to X’7F’ Execute Device Diagnostic X’90’ Diagnostic code Host Commands Initialize Device Parameters X’91’ Download Micro Code X’92’ Operation of Download Micro Code Standby Immediate X’94’ or X’E0’ Idle Immediate X’95’ or X’E1’ Standby X’96’ or X’E2’ Idle X’97’ or X’E3’ Host Commands Check Power Mode X’98’ or X’E5’ ’FF’ Sleep X’99’ or X’E6’ Smart X’B0 Features Register values subcommands and functions 1 Smart Disable Operations Features Register values subcommands and functions 2Smart Enable Operations Smart Read LOG ’DA’ Smart Return Status Features Register values subcommands and functions 3Smart ENABLE/DISABLE Auto OFF-LINE Interface Format of insurance failure threshold value data Format of device attribute value data1FF Data format version number Attribute ID Attribute value for the worst case so far Status FlagCurrent attribute value Raw attribute value 11 Self-test execution status 10 Off-line data collection statusSelf-test execution status Failure prediction capability flag Off-line data collection capability12 Off-line data collection capability 13 Failure prediction capability flag Check sum Error logging capability14 Error logging capability Insurance failure threshold Smart error logging 16 Data format of Smart Summary Error Log Total number of drive errors Command data structureError data structure 17 Data format of Smart Comprehensive Error Log 1FC Smart Self-Test18 Smart self-test log data format Self-test number Current LBA under test 19 Selective self-test log data structureTest Span Current Span under test Selective Self-test pending time min Feature Flags20 Selective self-test feature flags Device Configuration Freeze Device Configuration XB1Device Configuration Restore Device Configuration Identify Device Configuration Identify FR = C2h Device Configuration Restore FR = C0hDevice Configuration Freeze Lock FR = C1h Device Configuration SET FR = C3h Host Commands 21 Device Configuration Identify data structure Execution example of Read Multiple command Read Multiple X’C4’ MSB Write Multiple X’C5’ Interface SET Multiple Mode X’C6’ Interface Read DMA X’C8’ or X’C9’ End head No. / LBA MSB Write DMA X’CA’ or X’CB’ Interface Read Buffer X’E4’ Flush Cache X’E7’ Write Buffer X’E8’ Identify Device X’EC’ Identify Device DMA X’EE’ 22 Information to be read by Identify Device command 1 ’3FFF’ 22 Information to be read by Identify Device command 2 Word Command without interrupt supports 2, 4, 8 and 16 sectors = Supports the Host Protected Area feature set = Supports the CFA Compact Flash Association feature set Interface Host Commands Diagnosis Word Bit Reserved Security level High, 1 Maximum ’AA’ SET Features X’EF’23 Features register values and settable modes ’BB’ Data Transfer Mode Advanced Power Management APM Automatic Acoustic Management AAM 24 Contents of Security SET Password data At command issuance I-O register contents 1F7 hCM 1F6 hDH Security UNLOCKX’F2’ When the master password is selectedWhen the user password is selected Host Commands Security Erase Prepare X’F3’ Security Erase Unit X’F4’ Security Freeze Lock X’F5’ At command issuance I-O register contents 1F7 hCM 1F6 hDH 26 Contents of security password Host Commands Read Native MAX Address X’F8’ SET MAX X’F9’ SET MAX Address SET MAX SET Password FR = 01h SET MAX Lock FR = 02h SET MAX Unlock FR = 03h SET MAX Freeze Lock FR = 04h Interface Read Sectors EXT X’24’ Option customizing Description Read DMA EXT X’25’ Option customizing Description HOB=1 Error reporting conditionsHOB=0 Read Multiple EXT X’29’ Option customizing Description Read LOG EXT X2F Optional command Customize Description Interface Write Sectors EXT X’34’ Option customizing Description Write DMA EXT X’35’ Option customizing Description SET MAX Address EXT X’37’ Option customizing Description SET MAX LBA Write Multiple EXT X’39’ Option customizing Description Write LOG EXT X’3F’ Optional command Customize Description Host Commands Read Verify Sectors EXT X’42 Option customizing Description Flush Cache EXT X’EA’ Option customizing Description Error posting 27 Command code and parameters 1 27 Command code and parameters 2 Execute Device Diagnostic Initialize Device Parameters Command ProtocolPIO Data transferring commands from device to host Read Sectors Command protocol Protocol for command abort PIO Data transferring commands from host to device Write Sectors command protocol Commands without data transfer Read Multiple EXT Write Multiple EXT Sleep Other commandsDMA data transfer commands Read DMA EXT Write DMA EXT Indentify Device DMA Normal DMA data transfer Ultra DMA Feature Set Overview Initiating an Ultra DMA data in burst Phases of operationUltra DMA data in commands Pausing an Ultra DMA data in burst Data in transfer Terminating an Ultra DMA data in burst Interface Ultra DMA Feature Set Ultra DMA data out commands Initiating an Ultra DMA data out burst Pausing an Ultra DMA data out burst Data out transfer Terminating an Ultra DMA data out burst Ultra DMA Feature Set Ultra DMA CRC rules DIOR-HDMARDY-HSTROBE Series termination required for Ultra DMA28 Recommended series termination for Ultra DMA DIOW-STOP PIO data transfer timing TimingPIO data transfer 10 Multiword DMA data transfer timing mode Multiword data transfer Ultra DMA data transfer 11 Initiating an Ultra DMA data in burst Name Mode Comment Strobe 29 Ultra DMA data burst timing requirements 2 MIN MAX Mode Name Comment 30 Ultra DMA sender and recipient timing requirements DD150 at device Dstrobe at host Sustained Ultra DMA data in burstDstrobe at device DD150 at host Dmack Host pausing an Ultra DMA data in burstDmarq Stop Device terminating an Ultra DMA data in burst DA0, DA1, DA2 CS0, CS1 Host terminating an Ultra DMA data in burstHost 16 Initiating an Ultra DMA data out burst Hstrobe at device DD150 at device Sustained Ultra DMA data out burstHstrobe at host DD150 at host Hstrobe host DD150 Host Device pausing an Ultra DMA data out burstDevice DMACK- host Stop host DDMARDY- device Host terminating an Ultra DMA data out burst 19 Host terminating an Ultra DMA data out burst DD150 Host Device terminating an Ultra DMA data out burstDmarq device DMACK- host Only master device is present Power-on and resetMaster and slave devices are present 2-drives configuration This page is intentionally left blank Operations Device Response to the Reset Response to power-on Response to hardware reset Response to power-on Response to hardware reset Response to software reset Response to software reset Response to diagnostic command Response to diagnostic command Active mode Power SavePower save mode Active idle mode Standby mode Sleep mode Spare area Power commandsDefect Processing Track slip processing Alternating processing for defective sectorsSector slip processing Automatic alternating processing Automatic alternating processing 8MB buffer 8,388,608 bytes Read-ahead CacheData buffer structure Read Sectors EXT Read Multiple EXT Read DMA EXT Read Multiple EXT Read Dmaext Commands that are targets of cachingCaching operation Data that is a target of caching Operations Using the read segment buffer Miss-hit Sequential Hit Full hit Partial hit Cache operation Command that are targets of cachingWrite Cache Invalidation of cached data Cashing function when power supply is turned on Status report in the event of an errorReset response Enabling and disabling Write Cache This page is intentionally left blank Glossary PIO Programmed input-output Power save modeRotational delay Positioning Status VCM This page is intentionally left blank Acronyms and Abbreviations This page is intentionally left blank Index AAM Index Information to be read by Identify Read Sectors Command Read Native MAX Address Surface temperature measurement This page is intentionally left blank Comment Form Japan This page is intentionally left blank C141-E202-01EN This page is intentionally left blank