Index

%

%S references

OVR_PRE not available with Redundancy CPUs, 1-4

A

Active unit

defined, 1-1

Appendix A

IC690CBL714A Multi-drop Cable, A-1

B

Background Window time, 4-19,4-20,4-22

different for redundancy CPUs, 1-4

Backup CPU

validating the logic solution, 4-13

Backup Unit

defined, 1-1

switching control to, 4-14

commanding from program, 4-14switching times, 4-14

validating the input scan, 4-13

Base sweep time

CGR772, 1-3

CGR935, 1-3

Battery connectors, 2-4

Bus Controller, Genius

configuring, 3-5connectors, 2-12description, 2-10faults, 5-13

installation requirements, 2-10

installing dual GBCs at same end of bus, 2-10LEDs, 2-12

switching, 4-23

Bus Receiver Module

connectors, 2-9description, 2-9LEDs, 2-9

Bus termination, 5-11

Bus Transmitter Module

configuring, 3-5connectors, 2-8description, 2-8IC687BEM713, 1/2 slot version, 1-5LEDs, 2-8

Bus, Genius

dual-bus network, 2-11single-bus network, 2-11

C

C debugger, 4-22

different for redundancy CPUs, 1-4

Cable

multi-drop, A-1

Checksum, 4-19

Checksum, program memory, 2-3Communications

terminating, 5-6

Compatibility

CGR935 and CPU780, 1-3

Configurable faults, 5-8

Configuration

connection for programmer, 3-1incompatible, 4-3

Constant Sweep mode, 3-4Contacts, timed, 4-21

Control programming software, 4-21Control Strategy

summarized, 1-8

CPU architecture, 2-3

CPU failure, 5-12

CPU LEDs

ENabled, 2-4

MEMory PROTECT, 2-4

OK, 2-4

P1, Port 1, 2-4

P2, Port 2, 2-4

P3, Port 3, 2-4

RUN, 2-4

CPU mode switch

positions and commands, 2-5Run/outputs disabled, 2-5Run/outputs enabled, 2-5Stop, 2-5

CPU Modes, 2-5

CPU Redundancy

defined, 1-1

CPU Redundancy modules

IC697CGR772, 1-5

IC697CGR935, 1-5

CPU Redundancy, duplex, 1-13Critical component

defined, 1-1

D

Data Transfer, 4-6

from backup to active unit, 4-10inputs, 4-6

outputs, 4-7time, 4-8

Dual Bus

defined, 1-1

Duplex CPU Redundancy, 1-13

GFK-1527A

Index-1

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Image 82
GE 90-70 manual Index, Battery connectors Bus Controller, Genius