Theory of Operation
The Microprocessor Board
HIL Interface
The Hewlett-Packard Human Interface Link (HP-HIL) is the interface between the microprocessor and the HP 16500B front panel. In the write mode, the interface controller serializes the 8-bit data and transmits the data to the devices on the link. In the read mode, the data is fed to the interface controller in serial format and to the microprocessor in parallel format.
HP-IB and RS-232C Interface
The HP 16500B interfaces to HP-IB as defined by IEEE Standard 488.2. The interface consists of two octal transceivers and an HP-IB controller. The controller relieves the microprocessor of the task of maintaining HP-IB protocol. The two transceivers provide data and control signal transfer between the bus and the controller.
The RS-232C interface is compatible with standard RS-232C protocol. The interface consists of a controller, an input buffer and an output buffer. The controller serializes parallel data from the microprocessor for transmission. In the receive mode, the controller converts incoming serial data to parallel data for the microprocessor. The controller also generates all the different baud rates and formats available with the mainframe. The input and output buffers transfer data and control signals to and from the RS-232C communication lines.
Display RAM, Color Palette, and CRT Control
The HP 16500B CRT display is driven by a Color Palette and CRT Control supported by 256 KBytes of video RAM. A single RAMDAC functions as the Color Palette for the eight-plane color monitor. RGB signals are provided by the RAMDAC. The RAMDAC sends an analog signal of 0.0 to -1.0 Volts for each of the primary colors (Red, Blue, Green) to the color module. Horizontal and vertical sync signals are provided by a CRT controller.
Hard Disk Drive Interface
The Hard Disk Drive Interface is made up of two octal transceivers and three buffers. The octal transceivers link the hard disk drive’s 16-bit data I/O port with the microprocessor data bus. The buffers link the hard disk drive’s control signals with both the address bus of the microprocessor and the peripheral interface signals so that the hard disk drive resides at a virtual address in read and write modes. The hard disk drive controller resides on the hard disk drive.
Flexible Disk Drive Interface
The main components of the Flexible Disk Drive Interface are the disk drive controller and buffers. The disk drive controller provides the interface between the microprocessor and the flexible disk drive. The controller also performs all functions necessary to write or read data to or from the disks. Data directed to the disk drive from the microprocessor is serialized by the disk drive controller.
The buffers link the microprocessor data bus with certain flexible disk drive control signals. The flexible disk drive informs the microprocessor through the data bus whether a flexible disk has been changed and whether the flexible disk drive is ready to read from or write to a flexible disk. The microprocessor can also inform the flexible disk drive to format a flexible disk with a high-density format.
Module Interface and Correlator
The Module Interface provides microprocessor access to the acquisition and stimulus option modules that are plugged into the mainframe. The Correlator provides the means for time-aligning module trace data on the mainframe display.