TC2S = 0 Stop and counter clear | IBM EM78P312N instruction

EM78P312N

8-Bit Microcontroller

Bank 1 R8 TC2CR/ ADDL (Timer/Counter 2 Control Register, AD Low 2 bits Data Buffer)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

ADD1

ADD0

0

TC2M

TC2S

TC2CK2

TC2CK1

TC2CK0

Bit 7

~ Bit 6 ( ADD1 ~ ADD0 ) : AD low 2-bit data buffer

Bit 4

( TC2M ) : Timer/Counter 2 mode select

TC2M = “0” : Timer/counter mode

TC2M = “1” : Window mode

Bit 3

( TC2S ) : Timer/Counter 2 start control

TC2S = “0” : Stop and counter clear

TC2S = “1” : Start

Bit 2 ~ Bit 0 ( TC2CK2 ~ TC2CK0 ) : Timer/Counter 2 Clock Source Select

TC2CK2		TC2CK1		TC2CK0		Clock Source		Resolution		Max. Time
TC2CK2		TC2CK1		TC2CK0		( Normal, Idle )		( Fc=8M )		( Fc=8M )
						( Normal, Idle )		( Fc=8M )		( Fc=8M )
0		0		0		Fc/223		1.05s		19.1h
0		0		1		Fc/213		1.02ms		1.1min
0		1		0		Fc/28		32μs		2.1s
0		1		1		Fc/23		1μs		65.5ms
1		0		0		Fc		125ns		7.9ms
1		0		1		-		-		-
1		1		0		-		-		-

1		1		1		External clock (TC2 pin)

Bank 1 R9 TC2DH (Timer 2 Data Buffer High Byte)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

TC2D15 TC2D14 TC2D13 TC2D12 TC2D11 TC2D10 TC2D9

TC2D8

Bit 7 ~ Bit 0 ( TC2D15 ~ TC2D8 ) : 16-bit Timer/Counter 2 data buffer high byte.

Bank 1 RA TC2DL (Timer 2 Data Buffer Low Byte)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

TC2D7

TC2D6

TC2D5

TC2D4

TC2D3

TC2D2

TC2D1

TC2D0

Bit 7 ~ Bit 0 ( TC2D7 ~ TC2D0 ) : 16-bit Timer/Counter 2 data buffer low byte.

Bank 1 RB ADCR (AD Control Register)

Bit 7		Bit 6		Bit 5		Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
ADREF		ADRUN		ADCK1		ADCK0	ADP	ADIS2	ADIS1	ADIS0

Bit 7 ( ADREF ) : AD reference voltage input select.

ADREF = “0” : Internal VDD, P97 is used as IO.

ADREF = “1” : External reference pin, P97 is used as reference input pin.

12 •	Product Specification (V1.0) 10.03.2006

(This specification is subject to change without further notice)

Image 16

IBM EM78P312N manual TC2S = 0 Stop and counter clear, Bank 1 R9 TC2DH Timer 2 Data Buffer High Byte

Contents

EM78P312N DOC. Version Elan Microelectronics Corporation Contents 14.1 16.116.2 16.3 General Description Bit Microcontroller Symbol Pin No Type Function Pin Description Functional Block Diagram Function Description Operating Registers Operating Registers R1 Time Clock /Counter Bit Microcontroller R0 Indirect Addressing RegisterR2 Program Counter & Stack User Memory Space R3 Status RegisterBit 7 ~ Bit 6 RBS1 ~ RBS0 R-Register page select RBS1 RBS0 Bit 1 SIS Sleep and Idle mode select SIS = 0 Idle mode SIS = 1 Sleep modeBit 0 C Carry flag R4 RAM Select Register R5 System Control Register RB Timer/Counter 4 Control Register Bit Microcontroller R6 Port 6 I/O Data RegisterBit 7 ~ Bit 0 P67 ~ P60 8-bit Port 6 I/O data register R7 Port 7 I/O Data Register RC Timer 4 Data Buffer Clock Source Resolution Max. TimeTC4CK2 TC4CK1 TC4CK0 Fosc=8M Bit Microcontroller RE Interrupt Status Flag Register RFInterrupt Status Flag Register Bank 1 R5 TC3CR Timer/Counter 3 Control Register TC3M = 1 Capture mode Bank 1 R6 TC3DA Timer 3 Data Buffer aBank 1 R7 TC3DB Timer 3 Data Buffer B Bit 7 TC3CAP Software capture control Bank 1 R9 TC2DH Timer 2 Data Buffer High Byte Bank 1 RA TC2DL Timer 2 Data Buffer Low ByteTC2S = 0 Stop and counter clear Bank 1 RB Adcr AD Control Register Bit 7 ~ Bit 0 ADE7 ~ ADE0 AD input pin enable control Bit 5~ Bit 4 ADCK1 ~ ADCK0 AD Conversion Time SelectBank 1 RC Adic AD Input Pin Control Bank 1 RD Addh AD High 8-bit Data Buffer TEN = 0 Disable TEN = 1 Enable Bit Microcontroller Bank 1 RE Tbktc TBT/Keytone ControlBank 2 R5 URC1 Uart Control Register Bit Bank 2 R7 URS Uart Status Register Bit 7 URRD8 Receiving data BitBRATE2 BRATE1 BRATE0 TC2CK1 TC2CK0 Bit 5 PRE Enable parity addition Bit 6 Even Select parity checkEven = 0 Odd parity Even = 1 Even parity Bank 2 R9 Urtd Uart Transmit Data Buffer Bit 5 ~ Bit 3 BRS0 ~ BRS2 SPI Clock Source Select Bit 2 EDS Data shift out edge selectEDS = 0 Rising edge EDS = 1 Falling edge Bit 0 WBE Write buffer empty flag. Read only PHE6x = 1 Disable P6x pull high Transfer ModeBank 3 RB PLC1 Pull Low Control Register SPID7 SPID6 SPID5 SPID4 SPID3 SPID2 SPID1 SPID0 Special Purpose Registers IOC6 ~ IOC9 − I/O Port Control Register Intcr − INT Control Register Address 0BhINT1ES = 0 Rising edge INT1ES = 1 Falling edge TC2ES = 0 Rising edge TC2ES = 1 Falling edge Adoscr − AD Offset Control Register Address 0Ch External InterruptCali Sign IMR2 − Interrupt Mask Register 2 Address 0Fh Uerrie Urie Utie Tbie EXIE1 TCIE0 CPU Operation Mode Registers for CPU Operation ModeMode Switching Control Operation Mode Sleep Mode Idle Mode Wake-up Signal R5 SIS = 1+SLEP R5 SIS= 0 + Slep InstructionAD Converter Wake-up Methods Operation Mode Max. Frequency Max. Conversion Rate per Bit ADC Data RegisterSampling Time Conversion Time Time Base Timer and Keytone Generator Address Name Bit MUX Registers for Uart Circuit Uart Universal Asynchronous Receiver/TransmitterName Bit Uart Mode Transmitting Receiving Baud Rate Generator Registers for the SPI Circuit SPI Serial Peripheral InterfaceRbank Address Name Bit Shift Direction and Sample Phase Transfer ModeBit Transmit Mode Serial Clock Bit Transmit/Receive Mode Bit Microcontroller Bit Receive ModeSCK pin Spis Multiple Device Connect /SS Timer/Counter Registers for Timer/Counter 2 Circuit Counter Mode Timer ModeWindow Mode Registers for Timer/Counter 3 Circuit 21 Window Mode Timing Chart Capture Mode 22 Configuration of Timer/Counter3 Registers for Timer 4 Circuit TCIF4 PDO Mode TCR4 PWM Mode 12 TCC/WDT & PrescalerUp-counter TC4 Interrupt Reset Reset and Wake-up13 I/O Ports Wake-up from Sleep Mode Wake-up from Idle Mode Address Name Reset Type Bit Summary of the Initialized Values for Registers Bit Microcontroller Register Bank SCR Addres URTD8 Reset Type Status of RST, T, and P of the Status RegisterBit Microcontroller General Purpose Registers Events that may affect the T and P Status 28 Controller Reset Block Diagram Interrupt Oscillator Oscillator ModesCrystal Oscillator/Ceramic Resonators Crystal Summary of Maximum Operating Speeds Oscillator Type Frequency Mode Frequency C1 pF C2 pF 740 EM78P312N 809N External RC Oscillator Mode OS CI Enwdtb = 0 Enable Enwdtb = 1 Disable Code Option RegisterCode Option Register Word Bit 12 ~ 9 Not used Power-on Considerations External Power-on Reset CircuitCustomer ID Register OSC = 0 RC type OSC = 1 Crystal type Residue-Voltage Protection VddEM78P312N EM78P809N Instruction Set Binary Instruction Hex Mnemonic Operation Status Binary Instruction Hex Mnemonic Operation Status Affected DEC Symbol Parameter Condition Min Typ Max Unit Absolute Maximum RatingsRecommended Operating Conditions Vss = DC Electrical Characteristics Ta= 25 C, VDD= 5.0V ± 5%, VSS= Ta= 25 C, VDD= 3.0V ± 5%, VSS= Varef Symbol Parameter Conditions Min Typ Max Unit AC Electrical CharacteristicTa=- 40C ~ 85 C, VDD=5V ± 5%, VSS=0V Timing Diagram AC Test Input/Output Waveform OTP MCU Package TypePin Count Package Size EM78P311SxY