Bit Microcontroller R0 Indirect Addressing Register | IBM EM78P312N

EM78P312N

8-Bit Microcontroller

R0 (Indirect Addressing Register)

R0 is not a physically implemented register. Its major function is to act as an indirect addressing pointer. Any instruction using R0 as a pointer actually accesses data pointed by the RAM Select Register (R4).

R1 (Time Clock /Counter)

This register is writable and readable just like the other registers. The contents of the prescaler counter are cleared only when a value is written into the TCC register.

R2 (Program Counter) & Stack

zDepending on the device type, R2 and hardware stack are 10-bit wide. The structure is depicted in Fig.5-3.

zGenerates 8192 ⋅13 bits on-chip OTP ROM addresses to the relative programming instruction codes. One program page is 1024 words long.

zR2 is set as all "0"s when under RESET condition

z"JMP" instruction allows direct loading of the lower 10 program counter bits. Thus, "JMP" allows the PC to go to any location within a page.

z"CALL" instruction loads the lower 10 bits of the PC, and then PC+1 is pushed onto the stack. Thus, the subroutine entry address can be located anywhere within a page.

z"RET" ("RETL k", "RETI") instruction loads the program counter with the contents of the top-level stack.

zAll instructions are single instruction cycle (fclk/2 or fclk/4) except for the instruction that would change the contents of R2. Such instruction will need one more instruction cycle.

zFor an interrupt trigger, the program ROM will jump to individual interrupt vector at Page 0. The CPU will store ACC, R3 status and R5 PAGE automatically, it will restore after instruction RETI.

Product Specification (V1.0) 10.03.2006

• 5

(This specification is subject to change without further notice)

Image 9

IBM EM78P312N Bit Microcontroller R0 Indirect Addressing Register, R1 Time Clock /Counter, R2 Program Counter & Stack

Contents

DOC. Version EM78P312N Elan Microelectronics Corporation Contents 16.1 14.116.2 16.3 Bit Microcontroller General Description Pin Description Symbol Pin No Type Function Function Description Functional Block Diagram Operating Registers Operating Registers Bit Microcontroller R0 Indirect Addressing Register R1 Time Clock /CounterR2 Program Counter & Stack R3 Status Register User Memory SpaceBit 7 ~ Bit 6 RBS1 ~ RBS0 R-Register page select RBS1 RBS0 SIS = 0 Idle mode SIS = 1 Sleep mode Bit 1 SIS Sleep and Idle mode selectBit 0 C Carry flag R4 RAM Select Register R5 System Control Register Bit Microcontroller R6 Port 6 I/O Data Register RB Timer/Counter 4 Control RegisterBit 7 ~ Bit 0 P67 ~ P60 8-bit Port 6 I/O data register R7 Port 7 I/O Data Register Clock Source Resolution Max. Time RC Timer 4 Data BufferTC4CK2 TC4CK1 TC4CK0 Fosc=8M RFInterrupt Status Flag Register Bit Microcontroller RE Interrupt Status Flag Register TC3M = 1 Capture mode Bank 1 R6 TC3DA Timer 3 Data Buffer a Bank 1 R5 TC3CR Timer/Counter 3 Control RegisterBank 1 R7 TC3DB Timer 3 Data Buffer B Bit 7 TC3CAP Software capture control Bank 1 RA TC2DL Timer 2 Data Buffer Low Byte Bank 1 R9 TC2DH Timer 2 Data Buffer High ByteTC2S = 0 Stop and counter clear Bank 1 RB Adcr AD Control Register Bit 5~ Bit 4 ADCK1 ~ ADCK0 AD Conversion Time Select Bit 7 ~ Bit 0 ADE7 ~ ADE0 AD input pin enable controlBank 1 RC Adic AD Input Pin Control Bank 1 RD Addh AD High 8-bit Data Buffer Bit Microcontroller Bank 1 RE Tbktc TBT/Keytone Control TEN = 0 Disable TEN = 1 EnableBank 2 R5 URC1 Uart Control Register Bit Bit 7 URRD8 Receiving data Bit Bank 2 R7 URS Uart Status RegisterBRATE2 BRATE1 BRATE0 TC2CK1 TC2CK0 Bit 6 Even Select parity check Bit 5 PRE Enable parity additionEven = 0 Odd parity Even = 1 Even parity Bank 2 R9 Urtd Uart Transmit Data Buffer Bit 2 EDS Data shift out edge select Bit 5 ~ Bit 3 BRS0 ~ BRS2 SPI Clock Source SelectEDS = 0 Rising edge EDS = 1 Falling edge Bit 0 WBE Write buffer empty flag. Read only Transfer Mode PHE6x = 1 Disable P6x pull highBank 3 RB PLC1 Pull Low Control Register SPID7 SPID6 SPID5 SPID4 SPID3 SPID2 SPID1 SPID0 Special Purpose Registers Intcr − INT Control Register Address 0Bh IOC6 ~ IOC9 − I/O Port Control RegisterINT1ES = 0 Rising edge INT1ES = 1 Falling edge TC2ES = 0 Rising edge TC2ES = 1 Falling edge External Interrupt Adoscr − AD Offset Control Register Address 0ChCali Sign Uerrie Urie Utie Tbie EXIE1 TCIE0 IMR2 − Interrupt Mask Register 2 Address 0Fh Registers for CPU Operation Mode CPU Operation ModeMode Switching Control Operation Mode Wake-up Signal R5 SIS = 1+SLEP R5 SIS= 0 + Slep Instruction Sleep Mode Idle ModeAD Converter Wake-up Methods ADC Data Register Operation Mode Max. Frequency Max. Conversion Rate per BitSampling Time Conversion Time Address Name Bit Time Base Timer and Keytone Generator MUX Uart Universal Asynchronous Receiver/Transmitter Registers for Uart CircuitName Bit Transmitting Uart Mode Baud Rate Generator Receiving SPI Serial Peripheral Interface Registers for the SPI CircuitRbank Address Name Bit Transfer Mode Shift Direction and Sample PhaseBit Transmit Mode Serial Clock Bit Microcontroller Bit Receive Mode Bit Transmit/Receive ModeSCK pin Multiple Device Connect /SS Spis Registers for Timer/Counter 2 Circuit Timer/Counter Timer Mode Counter ModeWindow Mode 21 Window Mode Timing Chart Registers for Timer/Counter 3 Circuit 22 Configuration of Timer/Counter3 Capture Mode TCIF4 Registers for Timer 4 Circuit TCR4 PDO Mode 12 TCC/WDT & Prescaler PWM ModeUp-counter TC4 Interrupt Reset and Wake-up Reset13 I/O Ports Wake-up from Idle Mode Wake-up from Sleep Mode Summary of the Initialized Values for Registers Address Name Reset Type Bit SCR Bit Microcontroller Register Bank Addres URTD8 Status of RST, T, and P of the Status Register Reset TypeBit Microcontroller General Purpose Registers Events that may affect the T and P Status Interrupt 28 Controller Reset Block Diagram Oscillator Modes OscillatorCrystal Oscillator/Ceramic Resonators Crystal Summary of Maximum Operating Speeds 740 EM78P312N 809N Oscillator Type Frequency Mode Frequency C1 pF C2 pF OS CI External RC Oscillator Mode Code Option Register Enwdtb = 0 Enable Enwdtb = 1 DisableCode Option Register Word Bit 12 ~ 9 Not used External Power-on Reset Circuit Power-on ConsiderationsCustomer ID Register OSC = 0 RC type OSC = 1 Crystal type Vdd Residue-Voltage ProtectionEM78P312N EM78P809N Binary Instruction Hex Mnemonic Operation Status Instruction Set DEC Binary Instruction Hex Mnemonic Operation Status Affected Absolute Maximum Ratings Symbol Parameter Condition Min Typ Max UnitRecommended Operating Conditions Vss = Ta= 25 C, VDD= 5.0V ± 5%, VSS= DC Electrical Characteristics Ta= 25 C, VDD= 3.0V ± 5%, VSS= Varef AC Electrical Characteristic Symbol Parameter Conditions Min Typ Max UnitTa=- 40C ~ 85 C, VDD=5V ± 5%, VSS=0V AC Test Input/Output Waveform Timing Diagram Package Type OTP MCUPin Count Package Size EM78P311SxY