EM78P312N
Bit 4 ~ Bit 2 ( TC4CK2 ~ TC4CK 0 ) : Timer/Counter 4 Clock Source Select
TC4CK2 | TC4CK1 |
| TC4CK0 |
| Clock Source |
| Resolution |
| Max. Time |
|
| ( Normal, Idle ) |
| ( Fosc=8M ) |
| ( Fosc=8M ) | |||
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0 | 0 |
| 0 |
| Fc/211 |
| 256μS |
| 65mS |
0 | 0 |
| 1 |
| Fc/27 |
| 16μS |
| 4mS |
0 | 1 |
| 0 |
| Fc/25 |
| 4μS |
| 1mS |
0 | 1 |
| 1 |
| Fc/23 |
| 1μS |
| 255μS |
1 | 0 |
| 0 |
| Fc/22 |
| 500nS |
| 127.5μS |
1 | 0 |
| 1 |
| Fc/21 |
| 250nS |
| 63.8μS |
1 | 1 |
| 0 |
| Fc |
| 125nS |
| 31.9μS |
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1 | 1 |
| 1 |
| External clock (TC4 pin) |
| − |
| − |
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Bit 1 ~ Bit 0 ( TC4M1 ~ TC4M0 ) : Timer/Counter 4 Operating Mode Select
TC4M1 |
| TC4M0 |
| Operating Mode |
0 |
| 0 |
| Timer/Counter |
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0 |
| 1 |
| Reserved |
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1 |
| 0 |
| Programmable Divider output |
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1 |
| 1 |
| Pulse Width Modulation output |
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RC (Timer 4 Data Buffer)
Bit 7 | Bit 6 | Bit 5 | Bit 4 | |
Bit 3
Bit 2 | Bit 1 | Bit 0 | |
TC4D7
TC4D6
TC4D5
TC4D4
TC4D3
TC4D2
TC4D1
TC4D0
Bit 7 ~ Bit 0 ( TC4D7 ~ TC4D0 ) : Data buffer of
RD (Interrupt Status Flag Register 0 and INT3 Edge Detect Flag)
Bit 7 | Bit 6 | Bit 5 | Bit 4 |
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Bit 3
Bit 2 | Bit 1 | Bit 0 |
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0
0
INT3F
INT3R
0
0
WDTIF
EXIF0
Bit 5 ( INT3F ) : External Interrupt 3 falling edge detect flag.
INT3F = “0” : Falling edge is not detected
INT3F = “1” : Falling edge is detected
Bit 4 ( INT3R ) : External Interrupt 3 rising edge detect flag.
INT3R = “0” : Rising edge is not detected
INT3R = “1” : Rising edge is detected
Bit 1 ( WDTIF ) : WDT
Bit 0 ( EXIF0 ) : External interrupt flag (INT0). Flag cleared by software. If the INT0EN is reset to “0”, the flag is cleared.
Product Specification (V1.0) 10.03.2006 | • 9 |
(This specification is subject to change without further notice)
