EM78P312N
8-Bit Microcontroller
7.2 AC Electrical Characteristic
Ta=- 40°C ~ 85 °C, VDD=5V ± 5%, VSS=0V
Symbol |
| Parameter |
| Conditions |
| Min | Typ |
| Max |
| Unit |
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Dclk |
| Input CLK duty cycle |
| − |
| 45 | 50 |
| 55 |
| % |
Tins |
| Instruction cycle time |
| Crystal type (high frequency) |
| 200 | − |
| DC |
| ns |
| (CLKS="0") |
| RC type |
| 500 | − |
| DC |
| ns | |
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Ttcc |
| TCC input period |
| − |
| (Tins+20)/ | − |
| − |
| ns |
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| N* |
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Tdrh |
| Device reset hold |
| Ta = 25°C |
| 11.3 | 16.2 |
| 21.6 |
| ms |
| time |
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Trst |
| /RESET pulse width |
| Ta = 25°C |
| 2000 | − |
| − |
| ns |
Twdt |
| Watchdog timer |
| Ta = 25°C |
| 11.3 | 16.2 |
| 21.6 |
| ms |
| period |
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Tset |
| Input pin setup time |
| − |
| − | 0 |
| − |
| ns |
Thold |
| Input pin hold time |
| − |
| − | 20 |
| − |
| ns |
Tdelay |
| Output pin delay time |
| Cload=20pF |
| − | 50 |
| − |
| ns |
Tstup1 |
| SDI data setup time |
| Setup time of SDI data input to SCK↑or SCK↓ |
| − | 25 |
| 50 |
| ns |
Thold1 |
| SDI data hold time |
| Hold time of SDI data input to SCK↓or SCK↑ |
| − | 25 |
| 50 |
| ns |
Tvalid1 |
| SDO output valid time |
| SCK↑or SCK↓to SDO data output |
| − | 25 |
| 50 |
| ns |
Tsckh |
| SCK input high time |
| Slave mode (Fmain=8 MHz) |
| 200 | − |
| − |
| ns |
Tsckl |
| SCK input low time |
| Slave mode (Fmain=8 MHz) |
| 200 | − |
| − |
| ns |
Tsetup2 |
| Slave mode setup |
| /SS↓ to SCK↑or SCK↓(Fmain=8 MHz) |
| 400 | − |
| − |
| ns |
|
| time |
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Tdelay1 |
| Slave mode unselect |
| /SS↑ to SDO output |
| − | 25 |
| 50 |
| ns |
|
| delay time |
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*N= selected prescaler ratio
62 • | Product Specification (V1.0) 10.03.2006 |
(This specification is subject to change without further notice)
