Serial Clock, Shift Direction and Sample Phase | IBM EM78P312N

EM78P312N

8-Bit Microcontroller

5.8.1 Serial Clock

Six internal clocks can be selected by setting BRS0 ~ BRS2 and the clock output to the outside from /SCK (P70) pin. The External clock can also be used and connected to /SCK (P70) pin.

5.8.2 Shift Direction and Sample Phase

Setting up the DORD bit of the SPIC1 register can determine the shift direction. Setting up the EDS bit of the SPIC1 register can select the rising edge or falling edge and latch the data. Setting up the SMP bit of the SPIC2 register can select the sample phase at the middle or at the end of the data output time.

5.8.3 Transfer Mode

The transmit, receive, transmit/receive mode can be selected by setting SPIM0 ~ SPIM1.

(a) 8-bit Transmit Mode

Set SPIM0 ~ SPIM12 to transmit mode and write data to the data buffer SPID. Set SPIS to “1” to start transmission. The data are output sequentially to the SO pin in synchronous with the serial clock. When the final bit of transfer data has been transferred, the SPI interrupt is generated and SPIS is cleared to “0” by hardware. In order to transmit the next data, the SPIS must be set to “1” again by software. If the next data is not written to the data buffer, the transfer is not started when using the internal clock.

SPIS	shift start		shift start
SPIS
RBF
WBE	shift finish
SO pin	a0 a1 a2 a3 a4 a5 a6 a7		b0 b1 b2 b3 b4 b5 b6 b7
SPIF
SPID	a		b
	write data		write data
	Fig. 5-14	Transmit Mode (8-bit, 1 word)

32 •	Product Specification (V1.0) 10.03.2006

(This specification is subject to change without further notice)

Image 36

IBM EM78P312N manual Serial Clock, Shift Direction and Sample Phase, Transfer Mode, Bit Transmit Mode, SO pin

Contents

EM78P312N DOC. Version Elan Microelectronics Corporation Contents 14.1 16.116.2 16.3 General Description Bit Microcontroller Symbol Pin No Type Function Pin Description Functional Block Diagram Function Description Operating Registers Operating Registers Bit Microcontroller R0 Indirect Addressing Register R1 Time Clock /CounterR2 Program Counter & Stack User Memory Space R3 Status RegisterBit 7 ~ Bit 6 RBS1 ~ RBS0 R-Register page select RBS1 RBS0 Bit 1 SIS Sleep and Idle mode select SIS = 0 Idle mode SIS = 1 Sleep modeBit 0 C Carry flag R4 RAM Select Register R5 System Control Register RB Timer/Counter 4 Control Register Bit Microcontroller R6 Port 6 I/O Data RegisterBit 7 ~ Bit 0 P67 ~ P60 8-bit Port 6 I/O data register R7 Port 7 I/O Data Register RC Timer 4 Data Buffer Clock Source Resolution Max. TimeTC4CK2 TC4CK1 TC4CK0 Fosc=8M Bit Microcontroller RE Interrupt Status Flag Register RFInterrupt Status Flag Register Bank 1 R5 TC3CR Timer/Counter 3 Control Register TC3M = 1 Capture mode Bank 1 R6 TC3DA Timer 3 Data Buffer aBank 1 R7 TC3DB Timer 3 Data Buffer B Bit 7 TC3CAP Software capture control Bank 1 R9 TC2DH Timer 2 Data Buffer High Byte Bank 1 RA TC2DL Timer 2 Data Buffer Low ByteTC2S = 0 Stop and counter clear Bank 1 RB Adcr AD Control Register Bit 7 ~ Bit 0 ADE7 ~ ADE0 AD input pin enable control Bit 5~ Bit 4 ADCK1 ~ ADCK0 AD Conversion Time SelectBank 1 RC Adic AD Input Pin Control Bank 1 RD Addh AD High 8-bit Data Buffer TEN = 0 Disable TEN = 1 Enable Bit Microcontroller Bank 1 RE Tbktc TBT/Keytone ControlBank 2 R5 URC1 Uart Control Register Bit Bank 2 R7 URS Uart Status Register Bit 7 URRD8 Receiving data BitBRATE2 BRATE1 BRATE0 TC2CK1 TC2CK0 Bit 5 PRE Enable parity addition Bit 6 Even Select parity checkEven = 0 Odd parity Even = 1 Even parity Bank 2 R9 Urtd Uart Transmit Data Buffer Bit 5 ~ Bit 3 BRS0 ~ BRS2 SPI Clock Source Select Bit 2 EDS Data shift out edge selectEDS = 0 Rising edge EDS = 1 Falling edge Bit 0 WBE Write buffer empty flag. Read only PHE6x = 1 Disable P6x pull high Transfer ModeBank 3 RB PLC1 Pull Low Control Register SPID7 SPID6 SPID5 SPID4 SPID3 SPID2 SPID1 SPID0 Special Purpose Registers IOC6 ~ IOC9 − I/O Port Control Register Intcr − INT Control Register Address 0BhINT1ES = 0 Rising edge INT1ES = 1 Falling edge TC2ES = 0 Rising edge TC2ES = 1 Falling edge External Interrupt Adoscr − AD Offset Control Register Address 0ChCali Sign IMR2 − Interrupt Mask Register 2 Address 0Fh Uerrie Urie Utie Tbie EXIE1 TCIE0 CPU Operation Mode Registers for CPU Operation ModeMode Switching Control Operation Mode Sleep Mode Idle Mode Wake-up Signal R5 SIS = 1+SLEP R5 SIS= 0 + Slep InstructionAD Converter Wake-up Methods Operation Mode Max. Frequency Max. Conversion Rate per Bit ADC Data RegisterSampling Time Conversion Time Time Base Timer and Keytone Generator Address Name Bit MUX Uart Universal Asynchronous Receiver/Transmitter Registers for Uart CircuitName Bit Uart Mode Transmitting Receiving Baud Rate Generator SPI Serial Peripheral Interface Registers for the SPI CircuitRbank Address Name Bit Shift Direction and Sample Phase Transfer ModeBit Transmit Mode Serial Clock Bit Microcontroller Bit Receive Mode Bit Transmit/Receive ModeSCK pin Spis Multiple Device Connect /SS Timer/Counter Registers for Timer/Counter 2 Circuit Timer Mode Counter ModeWindow Mode Registers for Timer/Counter 3 Circuit 21 Window Mode Timing Chart Capture Mode 22 Configuration of Timer/Counter3 Registers for Timer 4 Circuit TCIF4 PDO Mode TCR4 PWM Mode 12 TCC/WDT & PrescalerUp-counter TC4 Interrupt Reset and Wake-up Reset13 I/O Ports Wake-up from Sleep Mode Wake-up from Idle Mode Address Name Reset Type Bit Summary of the Initialized Values for Registers Bit Microcontroller Register Bank SCR Addres URTD8 Reset Type Status of RST, T, and P of the Status RegisterBit Microcontroller General Purpose Registers Events that may affect the T and P Status 28 Controller Reset Block Diagram Interrupt Oscillator Oscillator ModesCrystal Oscillator/Ceramic Resonators Crystal Summary of Maximum Operating Speeds Oscillator Type Frequency Mode Frequency C1 pF C2 pF 740 EM78P312N 809N External RC Oscillator Mode OS CI Enwdtb = 0 Enable Enwdtb = 1 Disable Code Option RegisterCode Option Register Word Bit 12 ~ 9 Not used Power-on Considerations External Power-on Reset CircuitCustomer ID Register OSC = 0 RC type OSC = 1 Crystal type Residue-Voltage Protection VddEM78P312N EM78P809N Instruction Set Binary Instruction Hex Mnemonic Operation Status Binary Instruction Hex Mnemonic Operation Status Affected DEC Symbol Parameter Condition Min Typ Max Unit Absolute Maximum RatingsRecommended Operating Conditions Vss = DC Electrical Characteristics Ta= 25 C, VDD= 5.0V ± 5%, VSS= Ta= 25 C, VDD= 3.0V ± 5%, VSS= Varef AC Electrical Characteristic Symbol Parameter Conditions Min Typ Max UnitTa=- 40C ~ 85 C, VDD=5V ± 5%, VSS=0V Timing Diagram AC Test Input/Output Waveform OTP MCU Package TypePin Count Package Size EM78P311SxY