82555 — Networking Silicon
■Low power consumption
—Typical total solution power including all resistors and magnetics:
-275 mA
-230 mA
-250 mA
—300 mA maximum total solution power in DTE (adapter) mode
—
Revision History
■Added modes for design, testing, and manufacturability
—Test Access Port (TAP)
-NAND Tree
-Board Level Functional Test (BIST)
—Programmable bypass for 4B/5B encoding/decoding and scrambler/ descrambler
—Diagnostic loopback mode
Revision | Revision | Description | |
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Jan. 1997 | 1.0 | First external release of the preliminary datasheet | |
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Apr. 1997 | 1.1 | First release edition | |
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Mar. 1998 | 2.0 | General editing | |
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The 82555 10/100 Mbps LAN Physical Layer Interface may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request.
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Copyright © Intel Corporation, 1997
ii | Datasheet |
