Networking Silicon — 82555

Bit(s)

Name

 

Description

Default

R/W

 

 

 

 

 

 

 

 

 

 

11

Power-Down

This bit sets the 82555 into a low power mode.

0

RW

 

 

1

= Power-down enabled

 

 

 

 

0

= Power-down disabled (normal operation)

 

 

 

 

 

 

 

10

Isolate

This bit allows the 82555 to electrically isolate the Media

0

RW

 

 

Independent Interface. When the MII is isolated, the

 

 

 

 

82555 does not respond to TXD[3:0], TXEN, and TXERR

 

 

 

 

input signals. Also, the 82555 presents high impedance

 

 

 

 

on its TXC, RXC, RXDV, RXERR, RXD[3:0], COL, and

 

 

 

 

CRS output signals. In the TX mode, the 82555 responds

 

 

 

 

to management transactions.

 

 

 

 

1

= Electrically isolate MII

 

 

 

 

0

= Normal operation

 

 

 

 

 

 

 

9

Restart Auto-

This bit restarts the Auto-Negotiation process and is self-

0

RW

 

Negotiation

clearing.

 

SC

 

 

 

 

 

 

 

1

= Restart Auto-Negotiation process

 

 

 

 

0

= Normal operation

 

 

 

 

 

 

 

8

Duplex Mode

This bit controls the duplex mode when Auto-Negotiation

0

RW

 

 

is disabled. If the 82555 reports that it is only able to

 

 

 

 

operate in one duplex mode, the value of this bit shall

 

 

 

 

correspond to the mode which the 82555 can operate.

 

 

 

 

When the 82555 is placed in Loopback mode, the

 

 

 

 

behavior of the PHY shall not be affected by the status of

 

 

 

 

this bit, bit 8.

 

 

 

 

1

= Full Duplex

 

 

 

 

0

= Half Duplex

 

 

 

 

 

 

 

7

Collision Test

This bit will force a collision in response to the assertion

0

RW

 

 

of the transmit enable signal.

 

 

 

 

1

= Force COL

 

 

 

 

0

= Do not force COL

 

 

 

 

 

 

 

6:0

Reserved

These bits are reserved and should be set to 0000000b.

0

RW

 

 

 

 

 

 

7.2.1.2Register 1: Status Register Bit Definitions

Bit(s)

Name

 

Description

Default

R/W

 

 

 

 

 

 

 

 

 

 

15

100BASE-T4

1 = 82555 able to perform 100BASE-T4

--

RO

 

 

0

= 82555 not able to perform 100BASE-T4

 

P

 

 

 

 

 

 

14

100BASE-TX Full

1

= 82555 able to perform full duplex 100BASE-TX

--

RO

 

Duplex

0

= 82555 not able to perform full duplex in repeater

 

P

 

 

 

 

 

mode

 

 

 

 

 

 

 

 

13

100 Mbps Half

1

= 82555 able to perform half duplex 100BASE-TX

--

RO

 

Duplex

0

= 82555 not able to perform 100BASE-TX

 

P

 

 

 

 

 

 

 

 

 

12

10 Mbps Full

1

= 82555 able to operate at 10 Mbps in full duplex

--

RO

 

Duplex

mode

 

P

 

 

 

 

 

 

 

0

= 82555 not able to operate in full duplex mode in

 

 

 

 

10BASE-T

 

 

 

 

 

 

 

 

11

10 Mbps Half

1

= 82555 able to operate at 10 Mbps in half duplex

--

RO

 

Duplex

mode

 

P

 

 

 

 

 

 

 

0

= 82555 not able to operate in 10BASE-T

 

 

 

 

 

 

 

10:7

Reserved

These bits are reserved and should be set to 0000b.

0

RO

 

 

 

 

 

 

Datasheet

29

Page 33
Image 33
Intel 82555 manual Register 1 Status Register Bit Definitions, 10BASE-T