3-36 Intel® PXA26x Processor Fa mily Developer’s Manual

Clocks and Power Manager
Table 3-21. CCCR Register Bi tma p an d Bit Definitions
0x4130 0000 Core Clock Configuration Register
(CCCR) Clocks Manager
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9876543210
Reserved
N
M
L
Reset 00000000000000000000000100100001
[31:10] Reserved.
Read undefined and must always be written with zeroes.
[9:7] N
RUN MODE FREQUENCY TO TURBO MODE FREQUEN CY MULTIPLIER:
Turbo Mode Freq. = run mode frequency * N
000 – Reserved
001 – Reserved
010 – Multiplier = 1
011 – Multiplier = 1.5
100 – Multiplier = 2
101 – Reserved
110 – Multiplier = 3
111 – Res erve d
Set to 010 on hardware and watchdog resets.
[6:5] M
MEMORY FREQUENCY TO RUN MODE FREQUENCY MULTIPLIER:
Memory Freq. = Crystal Freq. * L
00 – Reserved
01 – Multiplier = 1 (run mode frequency is equal to memory frequency)
10 – Multiplier = 2 (run mode frequency is 2 times the memory frequency)
11 – Multiplier = 4 (run mode frequency is 4 times the memory frequency)
Set to 01 on hardware and watchdog resets.
[4:0] L
CRYSTAL FREQUENCY TO MEMORY FREQUENCY MULTIPLIER:
00000 – Reserved
00001 – Multiplier = 27 (memory frequency is 99.53MHz from 3.6864 MHz crystal)
00010 – Multiplier = 32 (memory frequency is 117.96MHz from 3.6864 MHz crystal)
00011 – Multiplier = 36 (memory frequency is 132.71MHz from 3.6864 MHz crystal)
00100 – Multiplier = 40 (memory frequency is 147.46MHz from 3.6864 MHz crystal)
00101 – Multiplier = 45 (memory frequency is 165.89MHz from 3.6864 MHz crystal)
00110 t o 11111 – R eser v ed
Set to 00001 on hardware and watchdog resets.