8-4 Intel® PXA26x Processor Family Developer’s Manual
Synchronous Serial Port Controller
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8.4.1.2 SPI Format Details
The SPI format has four sub-modes. The sub-mode used depends on the SSPSCLK edge s elected
for driving and sampling data and on the phase mode of SSPSCLK selected (s ee Section8.7.2 for
complete description of each mode).
In idle mode or when the SSP is disabled, SSP SCLK and SSPTXD are low and SSPSFRM is high.
When transmit (outgoing) data is ready, SSPSFRM g oes lo w and s tays low fo r the r emaind er of t he
frame. The most significant serial data bit is driven onto SSPTXD a half-cycle later, and halfway
into the first bit period SSPSCLK asserts high and continues to ggling for the remaining data bits.
Data transitions on the configured SSPSCLK edge. From 4 to 16 bits may be transferred per frame.
When SSPSFRM is asserted, receive data is simultaneously driven from the peri pheral on
SSPRXD, most significant bit first. D ata transitions on the configured SSPS CLK edge and is
sampled by the controller on opposite edge. At the end of the frame, SSPSFRM is deasserted high
one clock period after the last bit is latched at its destination and th e completed incoming word is
shifted into the incoming FIFO. The peripheral can three- state SSP RXD af ter send ing t he las t bit of
the frame. SSPTXD retains the last value transmitted when the controller goes into idle mode,
unless the SSP port is disabled or reset (which forces S SPTXD to zero).
For back-to-back transfers, start and completion are similar to those of a single transfer but
SSPSFRM does not deassert between words. Both transmitter and receiver know the word length
and internally keep track of the start and end of words (frames). There are no dead bits. One
frame’s least significant bit is followed immediately by th e next frame’s most significant bit.
Figure 8-1. Texas Instruments’ Synchronous Serial Frame* Format
SSPSCLK ...
SSPSFRM ...
SSPTXD Bit<N> Bit<N-
1> ... Bit<1> Bit<0>
SSPRXD Bit<N> Bit<N-
1> ... Bit<1> Bit<0>
MSB 4 to 16 Bits LSB
Single Transfer
SSPSCLK ... ...
SSPSFRM ... ...
SSPTX /RX Bit<0> Bit<N> Bit<N-
1> ... Bit<1> Bit<0> Bit<N> Bit<N-
1> ... Bit<1> Bit<0>
Continuous Transfers