15-24 Intel® PXA26x Processor Family Developer’s Manual

MultiMediaCard Controller

The software can only write this register after the clock is turned off and the software has received

an interrupt that indicates the clock is turned off.

15.5.4 MMC_SPI Register

The MMC_SPI register is for SPI mode only and is set by the softwar e.

Table 15-8. MMC_CLK Reg ister

Physical Address
4110_0008 MMC_CLKRT Register MMC
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved CLK_RAT
E[2:0]
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bits Name Description
31:3 — Reserved
2:0 CLK_RATE[2:
0]
CLOCK RATE:
000 – 20-MHz clock
001 – 10-MHz clock, 1/2 of 20-MHz clock
010 – 5-MHz clock, 1/4 of 20-MHz clock
011 – 2.5-MHz clock, 1/8 of 20-MHz clock
100 – 1.25-MHz clock, 1/16 of 20-MHz clock
101 – 0.625-MHz clock, 1/32 of 20-MHz clock
110 – 0.3125-MHz clock, 1/64 of 20-MHz clock
111 – Res erved

Table 15-9. MMC_SPI Register (Sheet 1 of 2)

Physical Address
4110_000c MMC_SPI Register MMC
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
SPI_CS_ADDRESS
SPI_CS_EN
CRC_ON
SPI_EN
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bits Name Description
31:4 — Reserved
3SPI_CS_ADD
RESS
SPI CS RELATIVE ADDRESS:
Specifies the relative address of the card to activate the SPI CS
0 – Enables CS1
1 – Enables CS0
2 SPI_CS_EN
SPI CHIP SELECT ENABLE
0 – Disables the SPI chip select
1 – Enables the SPI chip select