CDM-570/570L Satellite Modem with Optional IP Module Revision 4
Functional Description MN/CDM570L.IOM
Following this, the data passes to the Plesiochronous/Doppler buffer, which has a
programmable size, or may be bypassed. From here, the receive clock and data signals
are routed to the terrestrial interface, and are passed to the externally connected DTE
equipment.
The CDM-570/570L signal processing functions are performed in a single, large Field-
Programmable Gate Array (FPGA), which permits rapid implementation of changes,
additions and enhancements in the field. These signal processing functions are controlled
and monitored by a 32-bit RISC microprocessor, which also controls all front panel,
serial and Ethernet interfaces.
Physically the CDM-570/570L modem is comprised of a single printed circuit card
assembly, with two expansion slots for FEC codecs and other option cards.
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