Functional Description | Multi-Tech Systems RAS96 specification

RAS96 RASCard User Guide

Functional Description

The on-board Single–Chip Transceiver (SCT) provides the connection to E1 lines (DS–1 long haul or DSX–1 short haul). The clock recovery circuitry automatically adjusts to E1 lines from 0 feet to over 6000 feet in length. The framer locates the frame and multiframe boundaries and monitors the data stream for alarms.

54	CommPlete Communications Server

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Multi-Tech Systems RAS96 manual Functional Description

Contents

RAS96 RASCard E1 User Guide RAS96 RASCard User Guide Important Safety Instructions Iii Table of Contents Solving Problems Appendix C Post CodesPage Introduction Introduction Manual Organization Appendix C Post Codes Technical SpecificationsAppendix B Post Messages Appendix D Approved Memory Humidity range 20-90% noncondensing RASCard Description Memory Banks RAS96 RASCard J14, J15, J16, J18 CPU Frequency Selection J17 Watchdog TimerJumpers Internal Connectors J22 E1 Alarm External ConnectorsJ2 Power Connector J35 Video Ethernet Status LEDs LED IndicatorsFront Panel E1 Status LEDs Reset Switch SwitchesPower Switch Page Installation Installation Procedure Safety WarningsPre-Installation Notes Installation Page Bios Setup Utility Starting Setup Getting Help Using SetupCase of Problems Chipset Features Setup Standard Cmos SetupBios Features Setup Power Management Setup Load Bios Defaults PCI Configuration SetupPassword Setting Load Setup Defaults IDE HDD Auto Detection Save and Exit Setup Exit Without Saving Time Standard Cmos SetupDate Hard Disks CGA Drive a Type / Drive B TypeVideo Halt On Memory Disabled Bios Features SetupEnabled Virus Warning Boot Up Floppy Seek Quick Power On Self TestBoot Sequence Boot Up NumLock Status Memory Parity Check Typematic Rate SettingGate A20 Option Typematic Rate Chars/Sec Security Option Typematic Delay MsecVideo Bios Shadow C8000 Cffff Shadow/DC000 Dffff Shadow Dram Timing Chipset Features SetupSystem Bios Cacheable IDE HDD Block Mode Video Bios CacheableBit I/O Recovery Time Memory Hole At 15M-16M PCI Streaming On-Chip Primary PCI IDEPCI Concurrancy PCI Bursting Power Management Setup Power Management Suspend Mode Doze ModeStandby Mode HDD Power Down LPT Ports Accessed Power Down ActivitiesCOM Ports Accessed Drive Ports Accessed 1st/2nd/3rd/4th Available IRQ PCI Configuration SetupSlot x Using INT# PCI IRQ Activated by PCI IDE IRQ Map to Password Setting Enter PasswordPage E1 Daughter Cards Specifications E1 Overview E1 Glossary E1 Basics E1 Line Coding Signaling OptionsE1 Frame Formats Dnis digits Country Selection Pin Signal E1 Facility Termination E1 Line Monitoring Jack RJ-11 Alarm JackPCB Description Test Modes Channelized E1 line with 30 DS-0 channels E1 Frame Format Configuration of the E1 Daughter CardOrdering an E1 Line Line Coding To Configure the E1 Daughter Card Factory Defaults E1 Commands Command Example RAS96 RASCard User Guide E1 Daughter Card RAS96 RASCard User Guide E1 Command Messages E1 Status LEDs Functional Description Solving Problems Troubleshooting RASCard has no video Keyboard does not respond to key strokes Invalid time, date or setupCOM1 port does not respond correctly Memory Upgrade Diagnostic Tests Calling Technical Support RAS96 RASCard User Guide Appendixes Video Connector J35 Appendix a Connector PinoutsKeyboard Connector J11 COM1 Connector J3 E1 Alarm Connector J22 Pin Floppy Disk Drive Connector J27 Drive Power Connector J13 Hard Disk Connector J6 IOCS16 IDE Connector J21 Figure A-7. IDE connector Post Beep Error MessagesAppendix B Post Messages Memory Verify Error at Memory Address Error atMemory parity Error at Offending Segment Appendix C Post Codes Code Name Description Post Codes E1-EF Appendix D Approved Memory Capacity Speed Type Manufacturer Part Number Usable MB EMC, Safety and Terminal Directive Compliance Appendix E Regulatory Information