National Instruments AT-MIO-16X Timing Connections for Data Acquisition and Analog Output , SCANCLK Signal, EXTSTROBE* Signal

Chapter 2 Configuration and Installa tion

National Instruments Corporation 2-33 AT-MIO-16X User Manual

Caution: Under no circumstances should these +5-V power pins be directly

connected to analog or digital ground or to any other voltage source on the

AT-MIO-16X or any other device. Doing so can damage the AT-MIO-16X

and the PC. National Instruments is not liable for damages resulting from

such a connection.

Timing Connections for Data Acquisition and Analog Output

The data acquisition and analog output timing signals are SCANCLK,

EXTSTROBE*, EXTCONV*, EXTTRIG*, EXTGATE*, and

EXTTMRTRIG*.

SCANCLK Signal

SCANCLK is an output signal that generates a low-to-high edge

whenever an A/D conversion begins. SCANCLK pulses only when

scanning is enabled on the AT-MIO-16X. SCANCLK is normally

low and pulses high for approximately 8 conversion begins. The

low-to-high edge can be used to clock external analog inp ut

multiplexers. The SCANCLK signal is driven by one CMOS TTL gate.

EXTSTROBE* Signal

A low pulse of no less than 500 ns is generated on the EXTSTROBE *

pin when the External Strobe Register is accessed. See the External

Strobe Register section in Chapter 4, Register Map and Descriptions,

for more information. Figure 2-13 shows the timing for the

EXTSTROBE* signal.

Figure 2-13. EXTSTROBE* Signal Timing

The pulse width is defined as 500 ns minimum. The EXTSTRO BE *

signal can be used by an external device to latch signals or trigger

events. The EXTSTROBE* signal i s a n H CT si gna l.

tw500 nsec

VOH

VOL