1The data is not received using a serial interface.
(A protocol is set to READY/BUSY state, and BUSY LINE is in SSD + state.)
Is the OSC oscillation waveform as specified in Figure
V
90ns
+ 4 to + 5V
0 to + 1V
T (ns)
Figure C-3-1
No Replace the OSC.
Yes Is a RST signal in Q3 is as specified in Figure
5V
0V
Figure C-3-2
No Check the RST circuit on the SDCT board.
A
C – 8