Oki 3320, 3321 specifications Mpu

2.1.4Parallel Interface Control

The parallel data input from the host to the interfaced LSI is latched to its internal register at the falling edge of the STROBE-N signal.

At the same time, the LSI sets the BUSY signal to the high level to inform the host that the data is being processed, and outputs the RXD signal to inform the MPU of data reception. The data is read upon receiving the RD-N signal from the MPU.

When the data processing ends, the BUSY signal is set to off and the ACK-N signal in sent to request the next data. When reception is impossible because the buffer is full, the BUSY signal is sent to request stopping of data transmission.

MPU

P16

LSI

NBSY

A/D bus

ACK

NSTB

RXD

NRXD

CN1

Receive Data

BUSY

ACK-N

STB-N

Data 1 to 8

STROBE

500ns max.

BUSY

ACK

2~8µs

RXD

2 – 8