Silicon Laboratories SI2494/39, SI2493/57/34/15/04 manual Firmware Upgrades

AN93

5.7.22.UAA (V.29 Mode Register)

UAA V.29 MODE

Bit	Name		Function
15:3	Reserved	Read returns zero.
2	RUDE	0	= Disables rude disconnect.
		1	= Enables rude disconnect.
1	V29ENA	0	= Disables V.29.
		1	= Enables V.29.
0	Reserved	Read returns zero.

5.7.23. UIDA Response and Answer Tone Delay Register

This register, which is reset to 0, allows the user to add a delay in increments of milliseconds to the time the modem waits before responding to an answer tone. This is useful in dealing with non-standard answering modems.

5.8. Firmware Upgrades

The Si24xx ISOmodem family contains an on-chip program ROM that includes the firmware required for the features listed in the data sheet. Additionally, the ISOmodem contains on-chip program RAM to accommodate minor changes to ROM firmware. This allows Silicon Labs to provide future firmware updates to optimize the characteristics of new modem designs and those already deployed in the field.

Firmware upgrades (patches) provided by Silicon Labs are files loaded into the ISOmodem program RAM after a reset using the AT:P command (see Table 39 on page 59). Once loaded, the upgrade status can be read using the ATI1 command to verify the firmware revision number. The entire firmware upgrade in RAM is always cleared on reset. To reload the file after reset or power down, the host processor rewrites the file using the AT:P command during post-reset initialization.

Patch files may be more than 6000 characters in some cases. They come in a .txt file containing multiple lines that are sent serially to the ISOmodem. Several patch-loading techniques can be used in different environments. See the description and Table 82. Whichever technique is used, it is suggested to do AT&T6 to verify the CRC of the loaded patch.

5.8.1. Method 1 (Fastest)

Send the entire file in quiet mode using a program that waits for a set amount of time after every line. This can result in load times as short as 0.7 seconds for a 6235-byte patch at 115 kbaud (UART interface mode). The file transfer should be preceded by ATZ or reset and followed by ATE0 and ATQ1. After the transfer, perform ATE1 and ATQ0 as needed. The delay between lines must be increased when using the parallel or SPI interface.

1.Low pulse on RESET signal for at least 5.0 ms.

2.Wait the reset-recovery time.

3.Send ATE0.

4.Wait for OK.

5.Send ATQ1 to the modem.

6.Wait 20 ms.

7.Send AT:PIC (first line of the patch).

8.Wait 20 ms.

...

(n-5) Send AT:PIC0 (last Line of Patch).

(n-4) Wait 20 ms.

(n-3) Send ATQ0 to the modem.

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