Silicon Laboratories SI2494/39 manual FastPOS Sample Program, Setup procedure, AT&D2, AT+FCLASS=1

AN93

A V.29 FastPOS Sample Program

Introduction

In previous versions of the interface to V.29 FastPOS, the HDLC layer was assumed to be implemented by the host software. Another issue was the case where the EPOS Terminal was calling a server that could answer either as V.29 FastPOS or V.22bis; it was not possible for the modem to “train down” to V.22bis.

To address these issues, a new interface has been implemented in the Rev D Si2493/57/34/15 and Rev A Si2494/ 39 and is available as a patch in the RevC ISOmodem. This interface allows the call to start as a V.29 FastPOS and can train down to V.22bis if the server NAC can answer as either a V.29 FastPOS or V.22bis. Please contact Silicon Laboratories, Inc. for the latest patch.

One of the improved aspects of this interface technique is to use two control lines: (RTS and DTR); RTS controls direction of transfer, while the DTR hangs up the line. The tradeoff here is that RTS can no longer be used as a method of stopping the modem from sending data to the host.

This is generally not an issue as long as the DTE rate is greater than the DCE rate and the host can keep up with the receiver without having to resort to the negation of RTS.

The data are in V.80 format. Just read and write data while toggling RTS as needed. Assert RTS to transmit and de-assert to receive. This is called a push-to-talk paradigm.

The description here shows how to set up and use the modem for V.29 FastPOS and also provides a sample program along with both a DTE trace and WAV files that capture what is happening at both ends of the modem. The only critical signals that are not recorded below but obviously controlled in the program are the RTS and DTR lines.

The hardware used was the Engineering Eval. Board Rev 3.2 and a 24xx2G-DC Rev 1.2 module containing a 24 pin 2457 Rev C ISOmodem chip plus a 3018 DAA chip. JP6 was strapped {1-2, 4-5, 7-8, 10-11, 13-14}. JP5 was unstrapped.

Setup procedure:

1.Host DTE Rate must be greater than 19200.

2.Host DTE must be configured for 8N1 CTS-only flow control

3.Load Patch “rc_p71_bcd8.txt”

AT+GCI=xxxxxxx
AT&D2	Enables escape pin (U70 HES bit needs to be set also.)
AT+IFC=0,2	Flow control setup
AT:U87,050A	V.80 Setup
AT\N0	Wire Mode
AT+FCLASS=1
AT:U7A,1
AT:UAA,8004
AT+ES=6,,8	Synch access mode
AT+ESA=0,0,0,,1	Synch access mode control

4.Make Sure RTS is negated (voltage high)

5.Make Sure DTR is asserted (voltage low)

6.Send ATDT###

Notes:

1.Patch is “Originate Only”

2.RTS is used as DIRECTION of transfer. Think “push-to-talk” paradigm. Assert RTS PRIOR to transmission. Negate RTS after frame has been sent. The modem will guarantee that the carrier is turned off after all current frames have been completed.

Rev. 1.3 261