Silicon Laboratories SI2493/57/34/15/04, SI2494/39 manual TSSOP-24 UART-Interface Options

AN93

2.1.4.1. Reset Strapping Options for TSSOP-24 with UART-Interface

UART-interface options for the 24-pin TSSOP package are shown in Table 6 below.

Table 6. TSSOP-24 UART-Interface Options

	Mode				Reset-Strap Pins
Input Clock	Autobaud	Three-Wire	Pin 4	Pin 11,	CTS	Pin 17	Pin 18	Pin 23
	Disabled?	EEPROM	FSYNC	Pin 15, AOUT		RI	SDI/EESD	DCD
		Interface?		Pin 16, INT
32 kHz	No	No	1	1		0	1	X
		Yes	0	1		0	1	X
	Yes	No	1	1		0	0	X
		Yes	0	1		0	0	X
4.9152 MHz	No	No	1	1		1	1	1
		Yes	0	1		1	1	1
	Yes	No	1	1		1	0	1
		Yes	0	1		1	0	1
27 MHz	No	No	1	1		1	1	0
		Yes	0	1		1	1	0
	Yes	No	1	1		1	0	0
		Yes	0	1		1	0	0

2.1.4.2. Reset Strapping Options for TSSOP-24 with Parallel-Interface

Parallel-interface options for the 24-pin TSSOP package appear in Table 7 below. The EEPROM and autobaud options are not available when the parallel interface is selected.

Table 7. TSSOP-24 Parallel-Interface Options

Mode			Reset-Strap Pins
Input Clock	Pin 9,	RD		Pin 11	Pin 15
	Pin 10, WR			SCLK	INT
27 MHz	1			0	0
4.9152 MHz	1			1	0

14 Rev. 1.3