Silicon Laboratories SI2494/39 manual 1. +++ Escape, Th Bit Escape, Escape Pin Escape

AN93

The system should then flush the receive buffer 100 ms after the escape command has been removed, send AT, and wait for OK. This ensures that the modem is in command mode because OK is caused by the AT command and not by the escape command.

5.9.1. +++ Escape

The +++ escape is enabled by default and is controlled by U70 [13] (TES). There are equal guard time periods before (leading) and after (trailing) the +++ set by the register S12, during which there must be no interface (UART, SPI or parallel) activity. If this inactivity criterion is met, the ISOmodem escapes to the command mode at the end of the S12 time period following the +++. Any activity in the host interface during either the leading or trailing time period causes the ISOmodem to ignore the escape request and remain in data mode. Timing for this escape sequence is illustrated in Figure 27.

	+++
Leading Guard		Trailing Guard
Time		Time

Guard Time = S12 (20 msec units)

Default Guard Time S12 = 50 (1.0 sec)

Guard Time Range = 10–255 (0.2–5.1 sec)

Figure 27. +++ Escape Timing

5.9.2. “9th Bit” Escape

The “9th Bit” escape mode feature is enabled by sending the AT\B6 command through autobaud, which detects a 9th bit space as “9th bit” escape mode. If this escape method is selected, a 1 detected on the ninth bit in a data word returns the modem to the command mode. The 9th bit is ignored when the modem is in the command mode. Timing for this escape sequence is illustrated in Figure 28.

UART Timing for Modem Transmit Path (9N1 Mode with 9th Bit Escape)

9-Bit Data

Mode

CTS

TX
Start	D0	D1	D2	D3	D4	D5	D6	D7	ESC	Stop
tRTS										tCTH

Figure 28. “9th Bit” Escape Timing

5.9.3. “Escape Pin” Escape

The “escape pin is controlled by U70 [15] (HES). This bit is 0 by default, which disables the escape pin, ESC. If HES is set to a 1, a high level on the ESC pin causes the modem to transition to the on-line command mode. The ESC pin status is polled by the processor, and there is a latency before OK is received and the modem is in command mode. The escape pin must be kept active until OK is received. In parallel or SPI interface mode, the function of the escape pin is replaced by bit 2 in Hardware Interface Register 1, described in "2.2.4.2. Hardware Interface Register 1" on page 25. Setting that bit high causes the modem to escape to the command mode.

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