Silicon Laboratories SI2494/39, SI2493/57/34/15/04 UART-Interface Signals, SPI-Interface Signals

AN93

2.2.2. Interface Signal Description

The following tables describe each set of UART, parallel and SPI interface signals:

			Table 15. UART-Interface Signals
Signal		Direction	Description
	TXD	Input	Data input from host TXD pin
RXD		Output	Data output to host RXD pin
		Input	Active-low request-to-send input for flow control
	RTS
		Output	Clear to send: Si2493 is ready to receive data on the TXD pin (active low)
	CTS

				Table 16. SPI-Interface Signals
Signal			Direction	Description
SCLK			Input	Serial data clock
MISO			Output	Serial data output
MOSI			Input	Serial data input
			Input	Chip select (active low)
		SS
			Output	Interrupt (active low)
	INT

				Table 17. Parallel-Interface Signals
Signal			Direction	Description
		A0	Input	Register selection (address input)
			Input	Chip select (active low)
		CS
			Input	Read enable (active low)
		RD
			Input	Write enable (active low)
	WR
D[7:0]			Bidirectional	Parallel data bus
			Output	Interrupt (active low)
	INT

2.2.3. UART Interface Operation

The UART interface allows the host processor to communicate with the modem controller through a UART driver. In this mode, the modem is analogous to an external “box” modem. The interface pins are 5 V tolerant and communicate with TTL-compatible, low-voltage CMOS levels. RS232 interface chips, such as those used on the modem evaluation board, can be used to make the UART interface directly compatible with a PC or terminal serial port.

2.2.3.1. UART Options

The DTE rate is set by the autobaud feature after reset. When autobaud is disabled, the UART is configured to

19.2kbps, 8-bit data, no parity and 1 stop bit on reset. The UART data rate is programmable from 300 bps to

307.2kbps with the AT\Tn command (see Table 42, “Extended AT\ Command Set,” on page 81). After the AT\Tn command is issued, the ISOmodem echoes the result code at the old DTE rate. After the result code is sent, all subsequent communication is at the new DTE rate.

The DTE baud clock is within the modem crystal tolerance (typically ±50 ppm), except for DTE rates that are uneven multiples of the modem clock. All DTE rates are within the +1%/–2.5% required by the V.14 specification. Table 18 shows the ideal DTE rate, the actual DTE rate, and the approximate error.

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