AN93

Si2493/57/34/15/04 (Revision D) and Si2494/39 Modem Designer’s Guide

1. Introduction

The Si2494/93/57/39/34/15/04 ISOmodem chipset family consists of a 38-pin QFN (Si2494/39) or 24-pin TSSOP (Si2493/57/34/15/04) or 16-pin SOIC (Si2493/57/34/15/04) low-voltage modem device, and a 16-pin SOIC line- side DAA device (Si3018/10) connecting directly with the telephone local loop (Tip and Ring). This modem solution is a complete hardware (controller-based) modem that connects to a host processor through a UART, parallel or SPI interface. Parallel and EEPROM interfaces are available only on the 38-pin QFN or 24-pin TSSOP package option. Refer to Table 4, “ISOmodem Capabilities,” on page 10 for available part number, capability and package combinations. Isolation is provided by Silicon Laboratories’ isolation capacitor technology, which uses high-voltage capacitors instead of a transformer. This isolation technology complies with global telecommunications standards including FCC, ETSI ES 203 021, JATE, and all known country-specific requirements.

Additional features include programmable ac/dc termination and ring impedance, on-hook and off-hook intrusion detection, Caller ID, loop voltage/loop current monitoring, overcurrent detection, ring detection, and the hook- switch function. All required program and data memory is included in the modem device. When the modem receives a software or hardware reset, all register settings revert to the default values stored in the on-chip program memory. The host processor interacts with the modem controller through AT commands used to change register settings and control modem operation. Country, EMI/EMC, and safety test reports are available from Silicon Laboratories representatives and distributors.

This application note is intended to supplement the Si2494/39 Revision A, Si2493 Revision D, and the Si2457/34/ 15/04 Revision D data sheets. It provides all the hardware and software information necessary to implement a variety of modem applications, including reference schematics, sample PCB layouts, AT command and register reference, country configuration tables, programming examples and more. Particular topics of interest can be easily located through the table of contents or the comprehensive index located at the back of this document.

 

XTI

XTO

 

 

 

 

 

CLKOUT

PLL

 

 

 

 

 

 

Clocking

 

 

 

 

 

 

 

 

 

 

 

 

 

EESD

EEPROM

Data Bus

 

 

 

 

EECLK

 

 

 

 

Interface

 

 

 

 

 

 

EECS

 

 

 

 

 

 

 

 

 

 

C1

Si3018/10

 

RXD

 

 

 

 

 

TXD

 

 

 

 

 

 

CTS

UART

Controller

 

 

 

To Phone

RTS

DSP

DAA

 

Interface

C2

Line

DCD

Interface

 

ESC

 

 

AOUT

 

 

 

 

 

RI

 

 

 

AOUTb

 

CS

 

 

 

 

 

 

 

 

 

 

 

 

 

WR

Parallel

 

 

 

 

 

 

RD

 

 

ROM

 

 

 

Interface

 

 

 

 

 

A0

 

 

 

 

 

 

 

 

 

 

 

 

D0-D7

 

 

 

RAM

 

 

 

SDI

 

Program Bus

 

 

 

SPI

 

 

 

 

SDO

 

 

 

 

 

 

SCLK

Interface

 

 

 

 

FSYNC

 

SS

 

 

 

Si3000

 

SDO

 

INT

 

 

 

Interface

 

SDI

 

 

 

 

 

 

MCLK

 

RESET

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 1. Functional Block Diagram

Rev. 1.3 8/11

Copyright © 2011 by Silicon Laboratories

AN93

This information applies to a product under development. Its characteristics and specifications are subject to change without notice.

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Silicon Laboratories SI2494/39, SI2493/57/34/15/04 manual Introduction, Functional Block Diagram