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Peripheral Architecture

2.5.1Write Operations

Write requests that initiate from the slave configuration bus interface of the local device write to the outbound command (CMD) FIFO. Data is subsequently read from the FIFO and encapsulated in a write request packet. The address is translated, and the packet is encoded and serialized before being transmitted to remote device. The remote device subsequently deserializes and decodes the receive data and writes it into the inbound CMD FIFO. A write operation initiates on the remote device’s master configuration bus interface after reading the address and data from the FIFO.

The data flow between two VLYNQs that are connected is shown in Figure 5. In the example shown in Figure 5, the write originates from the DM644x device.

Figure 5. Write Operations

 

 

 

System￿clock

 

VLYNQ￿clock

 

 

 

 

 

 

 

 

 

 

 

Serial

 

Slave

Address

Outbound

Outbound

 

8B/10B

 

TxData

config￿bus

command

TxSM

Serializer

 

translation

commands

encoding

 

 

interface

FIFO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Return

 

 

 

 

 

 

 

 

data

 

 

 

 

 

 

 

 

FIFO

 

 

 

 

 

 

Registers

 

 

 

Local￿VLYNQ

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Return

 

 

 

 

 

 

 

 

data

 

 

 

 

 

 

 

 

FIFO

 

 

 

 

 

Master

Address

Inbound

Inbound

 

8B/10B

 

Serial

config￿bus

command

RxSM

Deserializer

translation

commands

decoding

RxData

 

interface

FIFO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

System￿clock

 

VLYNQ￿Clock

 

 

 

 

 

 

 

 

 

 

 

Serial

 

Slave

Address

Outbound

Outbound

 

8B/10B

 

TxData

config￿bus

 

 

command

TxSM

Serializer

 

translation

commands

encoding

 

 

interface

 

 

FIFO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Return

 

 

 

 

 

 

 

 

data

 

 

 

 

 

 

 

 

FIFO

 

 

 

 

 

 

Registers

 

 

 

Remote￿VLYNQ

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Return

 

 

 

 

 

 

 

 

data

 

 

 

 

 

 

 

 

FIFO

 

 

 

 

 

 

 

 

 

 

 

 

Serial

 

Master

Address

Inbound

Inbound

 

8B/10B

 

RxData

config￿bus

command

RxSM

Deserializer

 

translation

commands

decoding

 

 

interface

FIFO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

14

VLYNQ Port

 

 

 

 

 

SPRUE36A –September 2007

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Texas Instruments VLYNQ Port manual Write Operations, TxSM