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VLYNQ Port Registers
3.13 Receive Address Map Size 3 Register (RAMS3)
The receive address map size 3 register (RAMS3) is used to identify the intended destination of inbound serial packets. The RAMS3 is shown in Figure 21 and described in Table 19.
Figure 21. Receive Address Map Size 3 Register (RAMS3)
31 | 2 | 1 | 0 |
RXADRSIZE3 |
| Reserved | |
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LEGEND: R/W = Read/Write; R = Read only; |
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Table 19. Receive Address Map Size 3 Register (RAMS3) Field Descriptions
Bit | Field | Value | Description |
RXADRSIZE3 | The RXADRSIZE3 field is used to determine if receive packets are destined for the third of | ||
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| four mapped address regions. RXADRSIZE3 is compared with the address contained in the |
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| receive packet. If the receive packet address is less than the value in RXADRSIZE3, the |
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| packet address is added to the receive address map offset 3 register (RAMO3) to obtain the |
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| translated address. |
Reserved | 0 | Reserved. Always read as 0. Writes have no effect. |
3.14 Receive Address Map Offset 3 Register (RAMO3)
The receive address map offset 3 register (RAMO3) is used with the receive address map size 3 register (RAMS3) to translate receive packet addresses to local device configuration bus addresses. The RAMO3 is shown in Figure 22 and described in Table 20.
Figure 22. Receive Address Map Offset 3 Register (RAMO3)
31 | 2 | 1 | 0 |
RXADROFFSET3 |
| Reserved | |
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LEGEND: R/W = Read/Write; R = Read only; |
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Table 20. Receive Address Map Offset 3 Register (RAMO3) Field Descriptions
Bit | Field | Value | Description |
RXADROFFSET3 |
| The RXADROFFSET3 field is used with the receive address map size 3 register (RAMS3) | |
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| to determine the translated address for serial data. If the receive packet address is less |
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| than the value in RAMS3, the packet address is added to the contents of this register to |
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| obtain the translated address. |
Reserved | 0 | Reserved. Always read as 0. Writes have no effect. |
36 | VLYNQ Port | SPRUE36A |