| Appendices |
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| Apx. C Pin Assignments | ||||
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| - |
| - |
| 78 |
| M_B_A(15) |
| I/O |
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| 77 |
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| 79 |
| M_B_BS2 |
| O |
| 80 |
| M_B_A(14) |
| I/O |
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| 81 |
| +V1.5 |
| - |
| 82 |
| +V1.5 |
| - |
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| 83 |
| M_B_A(12) |
| I/O |
| 84 |
| M_B_A(11) |
| I/O |
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| 85 |
| M_B_A(9) |
| I/O |
| 86 |
| M_B_A(7) |
| I/O |
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| 87 |
| +V1.5 |
| - |
| 88 |
| +V1.5 |
| - |
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| 89 |
| M_B_A(8) |
| I/O |
| 90 |
| M_B_A(6) |
| I/O |
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| 91 |
| M_B_A(5) |
| I/O |
| 92 |
| M_B_A(4) |
| I/O |
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| 93 |
| +V1.5 |
| - |
| 94 |
| +V1.5 |
| O |
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| 95 |
| M_B_A(3) |
| I/O |
| 96 |
| M_B_A(2) |
| I/O |
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| 97 |
| M_B_A(1) |
| I/O |
| 98 |
| M_B_A(0) |
| I/O |
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| 99 |
| +V1.5 |
| - |
| 100 |
| +V1.5 |
| - |
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| 101 |
| M_CLK_DDR2 |
| O |
| 102 |
| M_CLK_DDR3 |
| O |
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| 103 |
| M_CLK_DDR#2 |
| O |
| 104 |
| M_CLK_DDR#3 |
| O |
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| 105 |
| +V1.5 |
| - |
| 106 |
| +V1.5 |
| - |
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| 107 |
| M_B_A(10) |
| I/O |
| 108 |
| M_B_BS1 |
| O |
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| 109 |
| M_B_BS0 |
| O |
| 110 |
| M_B_RAS# |
| O |
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| 111 |
| +V1.5 |
| - |
| 112 |
| +V1.5 |
| - |
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| 113 |
| M_B_WE# |
| O |
| 114 |
| M_CS#2 |
| O |
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| 115 |
| M_B_CAS# |
| O |
| 116 |
| M_ODT2 |
| O |
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| 117 |
| +V1.5 |
| - |
| 118 |
| +V1.5 |
| - |
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| 119 |
| M_B_A(13) |
| I/O |
| 120 |
| M_ODT3 |
| O |
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| 121 |
| M_CS#3 |
| O |
| 122 |
| - |
| - |
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| 123 |
| +V1.5 |
| - |
| 124 |
| +V1.5 |
| - |
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| 125 |
| - |
| I/O |
| 126 |
| M_VREF |
| - |
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| 127 |
| DGND |
| - |
| 128 |
| DGND |
| - |
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| 129 |
| M_B_DQ(32) |
| I/O |
| 130 |
| M_B_DQ(36) |
| I/O |
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| 131 |
| M_B_DQ(33) |
| I/O |
| 132 |
| M_B_DQ(37) |
| I/O |
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| 133 |
| DGND |
| - |
| 134 |
| DGND |
| - |
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| 135 |
| M_B_DQS#(4) |
| O |
| 136 |
| M_B_DM(4) |
| O |
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| 137 |
| M_B_DQS(4) |
| O |
| 138 |
| DGND |
| - |
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| 139 |
| DGND |
| - |
| 140 |
| M_B_DQ(38) |
| I/O |
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| 141 |
| M_B_DQ(34) |
| I/O |
| 142 |
| M_B_DQ(39) |
| I/O |
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| 143 |
| M_B_DQ(35) |
| I/O |
| 144 |
| DGND |
| - |
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| 145 |
| DGND |
| - |
| 146 |
| M_B_DQ(44) |
| I/O |
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| 147 |
| M_B_DQ(40) |
| I/O |
| 148 |
| M_B_DQ(45) |
| I/O |
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Satellite E200/205 Maintenance Manual | ||
