Xilinx UG129 manual Input and Output Ports, Portid Port

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Chapter 6

Input and Output Ports

The PicoBlaze™ microcontroller supports up to 256 input ports and 256 output ports that can also be combined to create input/output ports. The interface signals from Figure 2-1involved in INPUT and OUTPUT operations are described below.

The PORT_ID[7:0] output port presents the port identifier number or port address for both INPUT and OUTPUT operations.

The IN_PORT[7:0] input port captures input data during INPUT operations.

The OUT_PORT[7:0] output port presents output data during OUTPUT operations.

The READ_STROBE output is asserted High during the second cycle of the two-cycle INPUT operation.

The WRITE_STROBE output is asserted High during the second cycle of the two-cycle OUTPUT operation.

In timing critical designs, set timing constraints for the PORT_ID and data paths allowing two clock cycles. Only the read and write strobes need to be constrained to a single clock cycle. For maximum performance and to simplify timing constraints, insert a pipeline register where possible, as described in the following sections.

Thought-out design keeps the interface logic compact with good performance. The following diagrams show circuits suitable for output ports, input ports, and for connecting memory. When using a logic synthesis tool, check that the source code is not describing a circuit that is more complex than is actually required and that the synthesis tool is implementing the intended logic.

PORT_ID Port

The 8-bit PORT_ID port supplies the port identifier or port address for the associated INPUT or OUTPUT operation. The PORT_ID port is valid for two clock cycles, allowing sufficient time for any interface decoding logic and for connections to asynchronous RAM. Similarly, the two-cycle operation allows read operations from synchronous RAM, such as block RAM.

INPUT and OUTPUT operations support both direct and indirect addressing. The port address is supplied as either as an 8-bit immediate constant or specified indirectly as the contents of any of the 16 data registers. Indirect addressing is ideal when accessing a block of memory, either a peripheral at contiguous port addresses or some form of block or distributed memory within or external to the FPGA.

Adding external peripherals to the PicoBlaze microcontroller is relatively straightforward. The only challenge is decoding the PORT_ID value using the minimum required logic for the application. The decoding challenge depends on the number of input, output, or bidirectional ports, as described in Table 6-1and subsequent text.

PicoBlaze 8-bit Embedded Microcontroller

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UG129 (v1.1.2) June 24, 2008

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Xilinx UG129 manual Input and Output Ports, Portid Port