Sun Microsystems SME5224AUPA-400 manual UPA Connector PIN Assignments Bottom View

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UltraSPARC™-II CPU Module

Advanced Version

400 MHz CPU, 4.0 MB E-Cache

SME5224AUPA-400

UPA CONNECTOR PIN ASSIGNMENTS (BOTTOM VIEW)

(Pin 5) GND

(Pin 11) GND GND GND

VDD_CORE

GND

VDD_CORE

GND

GND

GND

GND

VDD_CORE GND VDD_CORE UPA_PORT_ID[1]

GND

GND

GND VDD_CORE GND VDD_CORE GND (Pin 137) GND

(Pin 143) GND

(Pin 149) GND (Pin 155) VDD_CORE GND VDD_CORE GND GND GND GND VDD GND VDD GND GND GND GND VDD GND VDD GND GND GND GND VDD GND VDD GND GND GND GND

(Pin 323) VDD

(Pin 329) GND

Pin 3

(Pin 2) GND UPA_ADDR[8] (Pin 3)

(Pin 8) VDD UPA_ADDR[10] (Pin 9)

GND UPA_ADDR[12]

VDD_CORE UPA_ADDR[14]

GND UPA_ADDR[24]

GND UPA_ADDR[26]

GND UPA_ADDR[28]

GND UPA_ADDR[30]

VDD_CORE UPA_ADDR[35]

GND UPA_REQ_OUT

VDD_CORE UPA_REQ_IN[1]

GND UPA_P_REPLY[4]

GND UPA_DATA_STALL

GND TRST_L

POWER_0V POWER_SET_NEG

VDD_CORE UPA_RESET_L

GND UPA_S_REPLY[4]

VDD_CORE UPA_SPEED[1]

GND UPA_ECC[14]

GND UPA_ECC[12]

GND UPA_DATA[94]

GND UPA_DATA[92]

(Pin 134) VDD_CORE UPA_DATA[90] (Pin 135)

(Pin 140) GND UPA_DATA[88] (Pin 141)

(Pin 146) VDD_CORE UPA_DATA[78] (Pin 147)

(Pin 152) GND UPA_DATA[76] (Pin 153)

GND UPA_DATA[74]

GND UPA_DATA[72]

GND UPA_DATA[126]

VDD_CORE UPA_DATA[124]

GND UPA_DATA[122]

VDD UPA_DATA[120]

GND UPA_DATA[110]

GND UPA_DATA[108]

GND UPA_DATA[106]

GND UPA_DATA[104]

VDD UPA_ECC[6]

GND UPA_ECC[4]

VDD UPA_DATA[62]

GND UPA_DATA[60]

GND UPA_DATA[58]

GND UPA_DATA[56]

GND UPA_DATA[46]

VDD UPA_DATA[44]

GND UPA_DATA[42]

VDD UPA_DATA[40]

GND UPA_DATA[30]

GND UPA_DATA[28]

GND UPA_DATA[26]

GND UPA_DATA[24]

VDD UPA_DATA[14]

GND UPA_DATA[12]

VDD UPA_DATA[10]

(Pin 320) GND UPA_DATA[8] (Pin 321)

(Pin 326) GND UPA_CLK1_POS (Pin 327)

UPA_ADDR[9] (Pin 6) UPA_ADDR[11] (Pin 12) UPA_ADDR[13] UPA_ADDR[15] UPA_ADDR[25] UPA_ADDR[27] UPA_ADDR[29] UPA_ADDR[31]

UPA_ADDR_VALID UPA_REQ_IN[0] UPA_P_REPLY[3] UPA_SC_REQ_IN TCK POWER_SET_POS TMS UPA_S_REPLY[3] UPA_SPEED[2] UPA_ECC[15] UPA_ECC[13] UPA_DATA[95] UPA_DATA[93] UPA_DATA[91] UPA_DATA[89] (Pin 138) UPA_DATA[79] (Pin 144)

UPA_DATA[77] (Pin 150) UPA_DATA[75] (Pin 156) UPA_DATA[73] UPA_DATA[127] UPA_DATA[125] UPA_DATA[123] UPA_DATA[121] UPA_DATA[111] UPA_DATA[109] UPA_DATA[107] UPA_DATA[105] UPA_ECC[7] UPA_ECC[5] UPA_DATA[63] UPA_DATA[61] UPA_DATA[59] UPA_DATA[57] UPA_DATA[47] UPA_DATA[45] UPA_DATA[43] UPA_DATA[41] UPA_DATA[31] UPA_DATA[29] UPA_DATA[27] UPA_DATA[25] UPA_DATA[15] UPA_DATA[13] UPA_DATA[11] UPA_DATA[9]

TDO (Pin 324)

UPA_CLK1_NEG (Pin 330)

July 1999

Sun Microsystems, Inc

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Contents Module Description Module Features Module BenefitsEase of System Design PerformanceCPU Description CPU Features CPU BenefitsUltraSPARC-II CPU External Cache Description Data Buffer DescriptionUltraSPARC-II Data Buffer UDB-II Module Component Overview Block DiagramSystem Interface UPA Connector PinsUPA Interconnect Module ID Module PowerJtag Interface Signal Type Name and Function Signal DescriptionSystem Interface Clock InterfaceJTAG/Debug Interface Miscellaneous SignalsInitialization Interface System Clocks Module ClocksSystem Clock Distribution Tested CPU to UPAClock Signal Distribution Symbol Parameter Rating Units Electrical CharacteristicsSymbol Parameter Min Typ Max Units Absolute Maximum RatingsModule Power Consumption DC CharacteristicsSymbol Parameter Conditions Min Typ Max Units Module System Loading Example for UPADATA, Upaecc UPA Data Bus Spice ModelUpaclk Module Clocks Setup and Hold Time SpecificationsCpuclk Module Clock Clock BuffersTiming Measurement Waveforms Propagation Delay, Output Hold Time SpecificationsMin Max Unit CPU Module Components Mechanical SpecificationsCPU Module Side View Two Step Approach to Thermal Design Thermal SpecificationsTerm Definition Specification Comments Thermal Definitions and SpecificationsAirflow Cooling Measurement Method Temperature Estimating and Measuring MethodsAir Velocity Specifications Air VelocityHeatsink Temperature Measuring Method Case Temperature Measuring MethodMHz CPU MHz TCK Symbol Parameter Signals Conditions AC Characteristics Jtag TimingJtag Testability Jtag Ieee 1149.1 Timing Pin UPA Connector PIN Assignments TOP ViewVddcore GND Vddcore GND Vddcore UPAPORTID1 UPA Connector PIN Assignments Bottom ViewHandling CPU Modules Storage and Shipping SpecificationValue Parameter Conditions Min Typ Document Revision History Ordering InformationPart Number CPU Speeds Description Date Document No ChangeSun Microsystems, Inc UltraSPARC -II CPU Module UltraSPARC-II CPU Data Buffer Description Block Diagram System Interface Module ID System Interface JTAG/Debug Interface UPA and CPU Clocks Clock Signal Distribution Absolute Maximum Ratings DC Characteristics UPA Data Bus Spice Model Upaclk Module Clocks Propagation Delay, Output Hold Time Specifications Mechanical Specifications CPU Module Side View Two Step Approach to Thermal Design Thermal Definitions and Specifications Temperature Estimating and Measuring Methods Case Temperature Measuring Method AC Characteristics Jtag Timing Jtag Ieee 1149.1 Timing UPA Connector PIN Assignments TOP View UPA Connector PIN Assignments Bottom View Storage and Shipping Specification Ordering Information Sun Microsystems, Inc
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