Sun Microsystems SME5224AUPA-400 manual Storage and Shipping Specification

Page 54

UltraSPARC-II CPU Module

SME5224AUPA-400400 MHz CPU, 4.0 MB E-Cache

STORAGE AND SHIPPING SPECIFICATION

 

 

 

Value

 

 

Parameter

Conditions

Min.

Typ.

Max

Unit

Temperature

Ambient

-40

90

°C

 

 

 

 

 

 

Temperature ramp

Ambient

10

°C/min.

 

 

 

 

 

 

Shock (shipping)

Drop height on to any edge, corner, or side of

21

inches

- single module package

shipping box

 

 

 

 

 

 

 

 

 

 

Shock(shipping)

Drop height on to any edge, corner, or side of

18

inches

- multi-module package

shipping box

 

 

 

 

 

 

 

 

 

 

HANDLING CPU MODULES

CAUTION: Handle a module by carefully holding it by its edges and by the large CPU heatsink. Do not bump or handle the SRAM heatsinks because this action can cause unseen damage to the solder connections. Always handle modules and other electronic devices in an ESD-controlled environment.

26

Sun Microsystems, Inc

July 1999

Image 54
Contents Ease of System Design Module Features Module BenefitsModule Description PerformanceCPU Features CPU Benefits CPU DescriptionUltraSPARC-II CPU Data Buffer Description External Cache DescriptionUltraSPARC-II Data Buffer UDB-II Block Diagram Module Component OverviewUPA Connector Pins System InterfaceUPA Interconnect Module Power Module IDJtag Interface System Interface Signal DescriptionSignal Type Name and Function Clock InterfaceMiscellaneous Signals JTAG/Debug InterfaceInitialization Interface System Clock Distribution Module ClocksSystem Clocks Tested CPU to UPAClock Signal Distribution Symbol Parameter Min Typ Max Units Electrical CharacteristicsSymbol Parameter Rating Units Absolute Maximum RatingsDC Characteristics Module Power ConsumptionSymbol Parameter Conditions Min Typ Max Units UPA Data Bus Spice Model Module System Loading Example for UPADATA, UpaeccCpuclk Module Clock Setup and Hold Time SpecificationsUpaclk Module Clocks Clock BuffersPropagation Delay, Output Hold Time Specifications Timing Measurement WaveformsMin Max Unit Mechanical Specifications CPU Module ComponentsCPU Module Side View Thermal Specifications Two Step Approach to Thermal DesignThermal Definitions and Specifications Term Definition Specification CommentsAir Velocity Specifications Temperature Estimating and Measuring MethodsAirflow Cooling Measurement Method Air VelocityCase Temperature Measuring Method Heatsink Temperature Measuring MethodAC Characteristics Jtag Timing MHz CPU MHz TCK Symbol Parameter Signals ConditionsJtag Testability Jtag Ieee 1149.1 Timing UPA Connector PIN Assignments TOP View PinUPA Connector PIN Assignments Bottom View Vddcore GND Vddcore GND Vddcore UPAPORTID1Storage and Shipping Specification Handling CPU ModulesValue Parameter Conditions Min Typ Part Number CPU Speeds Description Ordering InformationDocument Revision History Date Document No ChangeSun Microsystems, Inc UltraSPARC -II CPU Module UltraSPARC-II CPU Data Buffer Description Block Diagram System Interface Module ID System Interface JTAG/Debug Interface UPA and CPU Clocks Clock Signal Distribution Absolute Maximum Ratings DC Characteristics UPA Data Bus Spice Model Upaclk Module Clocks Propagation Delay, Output Hold Time Specifications Mechanical Specifications CPU Module Side View Two Step Approach to Thermal Design Thermal Definitions and Specifications Temperature Estimating and Measuring Methods Case Temperature Measuring Method AC Characteristics Jtag Timing Jtag Ieee 1149.1 Timing UPA Connector PIN Assignments TOP View UPA Connector PIN Assignments Bottom View Storage and Shipping Specification Ordering Information Sun Microsystems, Inc