Recommended Operating Conditions

Texas Instruments TSB12LV26 manual Recommended Operating Conditions, Operation MIN NOM, Unit

Page 86

7.2	Recommended Operating Conditions

			OPERATION	MIN	NOM	MAX	UNIT

VCC	Core voltage	Commercial	3.3 V	3	3.3	3.6	V
VCCP	PCI I/O clamping voltage	Commercial	3.3 V	3	3.3	3.6	V

			5 V	4.5	5	5.5
			5 V	4.5	5	5.5

		PCI	3.3 V	0.475 VCCP		VCCP
VIH²	High-level input voltage	PCI	5 V	2		VCCP	V
			5 V	2		VCCP
		PHY interface		2		VCCP
		PHY interface		2		VCCP
		Miscellaneous³		2		V
						CCP
		PCI	3.3 V	0		0.325 VCCP
VIL²	Low-level input voltage	PCI	5 V	0		0.8	V
			5 V	0		0.8

		PHY interface		0		0.8
		PHY interface		0		0.8

		Miscellaneous³		0		0.8
		PCI	3.3 V	0		VCCP
VI	Input voltage	PHY interface		0		VCCP	V
		Miscellaneous³		0		VCCP
		PCI	3.3 V	0		VCCP
V §	Output voltage	PHY interface		0		VCCP	V
O
		Miscellaneous³		0		VCCP
tt	Input transition time (tr and tf)	PCI		0		6	ns
TA	Operating ambient temperature			0	25	70	°C
T ¶	Virtual junction temperature			0	25	115	°C
J

²Applies for external inputs and bidirectional buffers without hysteresis. ³ Miscellaneous pins are: GPIO2, GPIO3, SDA, SCL, CYCLEOUT.

§ Applies for external output buffers.

¶ The junction temperatures reflect simulation conditions. Customer is responsible for verifying junction temperature.

7±2

Image 86

Contents

Data Manual SLLS366A TSB12LV26 Important Notice Contents Page Mechanical Information List of Illustrations List of Tables ViiViii Features DescriptionOrdering Number Name Voltage Package Related DocumentsOrdering Information OHCI-Lynx PCI-Based Ieee 1394 Host ControllerVccp PZ Package TOP ViewVccp Pciclkrun Pciinta 3.3 VCC CCP±1. Signals Sorted by Terminal Number Terminal NameTerminal Description Name ±2. Signal Names Sorted Alphanumerically to Terminal Number±3. Power Supply Terminals Pciclk ±4. PCI System TerminalsPCIRST, terminal As open-drainDuring the data phase, AD31±AD0 contain data ±5. PCI Address and Data TerminalsIrdy ±6. PCI Interface Control TerminalsPcic BE0 Pcitrdy±7. Ieee 1394 PHY/Link Terminals ±8. Miscellaneous TerminalsPage ±1. Bit Field Access Tag Descriptions Access TAG Name Meaning±1. TSB12LV26 Block Diagram Vendor ID Register PCI Configuration Registers±2. PCI Configuration Register Map Register Name Offset±3. Command Register Description Command RegisterCommand Device ID Register±4. Status Register Description Status RegisterStatus Class Code and Revision ID Register Latency Timer and Class Cache Line Size RegisterLatency timer and class cache line size Class code and revision IDHeader Type and Bist Register Ohci Base Address RegisterTI extension base address TI Extension Base Address RegisterSubsystem Identification Register Subsystem identificationInterrupt Line and Pin Register Power Management Capabilities Pointer RegisterRegister Power management capabilities pointer Register Interrupt line and pinMingnt and Maxlat Register Ohci Control RegisterNextitem Capability ID and Next Item Pointer RegisterRegister Capability ID and next item pointer Capabilityid±14. Power Management Capabilities Register Description Power Management Capabilities RegisterRegister Power management capabilities Power management control and status Power Management Control and Status RegisterPower Management Extension Register Power management extension±17. Miscellaneous Configuration Register Miscellaneous Configuration RegisterMiscellaneous configuration ±18. Link Enhancement Control Register Description Link Enhancement Control RegisterLink enhancement control ±19. Subsystem Access Register Description Subsystem Access RegisterSubsystem access Subdevid±20. Gpio Control Register Description Gpio Control RegisterGpio control ±18 Guid ROM Guidrom ±1. Ohci Register MapDMA Context Register Name Abbreviation Offset PhysicalRequestFilterHiClear IsoRecvIntEventClearIsochronous receive interrupt mask IsoRecvIntMaskSet Physical request filter low PhysicalRequestFilterLoSetCommandPtr 40Ch + 32*n Pointer Context match ContextMatch Isochronous transmit context commandIsochronous receive context command Asynchronous context control ContextControlSet±2. Ohci Version Register Description Ohci Version RegisterOhci version Guid ROM Guid ROM Register±3. Guid ROM Register Description RSUAsynchronous transmit retries Asynchronous Transmit Retries RegisterCSR Data Register ±4. Asynchronous Transmit Retries Register DescriptionCSR compare CSR Compare RegisterCSR Control Register CSR control±6. Configuration ROM Header Register Description Configuration ROM Header RegisterConfiguration ROM header Bus Identification Register±7. Bus Options Register Description Bus Options RegisterBus options Guid high Guid High RegisterGuid Low Register Guid low±8. Configuration ROM Mapping Register Description Configuration ROM Mapping RegisterConfiguration ROM mapping Posted Write Address Low Register±9. Posted Write Address High Register Description Posted Write Address High RegisterPosted write address high Vendor ID±10. Host Controller Control Register Description Host Controller Control RegisterHost controller control Self ID-buffer pointer Self-ID Buffer Pointer RegisterSelf-ID Count Register Self-ID countIsochronous Receive Channel Mask High Register Isochronous receive channel mask highIsochronous Receive Channel Mask Low Register Isochronous receive channel mask low±14. Interrupt Event Register Description Interrupt Event RegisterInterrupt event Arrs Rscu Arrq Rscu±15. Interrupt Mask Register Description Interrupt Mask RegisterInterrupt mask Rscu RSCIsochronous Transmit Interrupt Event Register Isochronous transmit interrupt event±21 Isochronous Transmit Interrupt Mask RegisterIsochronous transmit interrupt mask Isochronous transmit interrupt maskIsochronous receive interrupt event Isochronous Receive Interrupt Event RegisterIsochronous Receive Interrupt Mask Register Isochronous receive interrupt mask±18. Fairness Control Register Description Fairness Control RegisterFairness control Fairness control±19. Link Control Register Description Link Control RegisterLink control ±20. Node Identification Register Description Node Identification RegisterNode identification CPS±21. PHY Control Register Description PHY Layer Control RegisterPHY layer control ±22. Isochronous Cycle Timer Register Description Isochronous Cycle Timer RegisterIsochronous cycle timer 24±12±23. Asynchronous Request Filter High Register Description Asynchronous Request Filter High RegisterAsynchronous request filter high ±29 ±24. Asynchronous Request Filter Low Register Description Asynchronous Request Filter Low RegisterAsynchronous request filter low ±30±25. Physical Request Filter High Register Description Physical Request Filter High RegisterPhysical request filter high Are accepted±32 ±26. Physical Request Filter Low Register Description Physical Request Filter Low RegisterPhysical request filter low Physical request filter lowPhysical upper bound Physical Upper Bound Register Optional RegisterPhysical upper bound ±34±27. Asynchronous Context Control Register Description Asynchronous Context Control RegisterAsynchronous context control Rscu RSU31±4 DescriptorAddress Asynchronous Context Command Pointer RegisterAsynchronous context command pointer RSC RSU Isochronous Transmit Context Control RegisterIsochronous transmit context control Isochronous Receive Context Control Register Isochronous Transmit Context Command Pointer RegisterIsochronous transmit context command pointer Isochronous receive context controlMultiChanMode CycleMatchEnableReserved. Bits 27±16 return 0s when read Match register see .43 is ignoredIsochronous receive context command pointer Isochronous Receive Context Command Pointer RegisterIsochronous receive context command pointer ±40Isochronous receive context match When the command descriptor w field is set to 11bIsochronous Receive Context Match Register ±31. Isochronous Receive Context Match Register Description±42 Gpio Interface Page 13h PCI register 40h PCI Ohci register ±1. Registers and Bits Loadable through Serial ROMROM Offset OHCI/PCI Offset Register Bits Loaded From ROM Rsvd PME ±2. Serial ROM MapByte Byte Description Address Electrical Characteristics Absolute Maximum Ratings Over Operating Temperature Ranges²Unit Recommended Operating ConditionsOperation MIN NOM Operation Test MIN MAX Unit Conditions Switching Characteristics for PCI Interface§Switching Characteristics for PHY-Link Interface§ Parameter Measured MIN TYP MAX UnitPage Mechanical Information PZ S-PQFP-G100Page Important Notice

Texas Instruments TSB12LV26 manual Recommended Operating Conditions, Operation MIN NOM, Unit

OPERATION

MIN

NOM

UNIT

VCCP

VCCP

VCCP

VCCP

VCCP

VCCP

VCCP

Operating ambient temperature

Virtual junction temperature