A SPECIFICATIONS

Hardware

Memory

512 K buffer

1 K serial EEPROM

Optional expansion ROM

128 K control SRAM

Bus Interface

PCI Local Bus Specification, Revision 2.1 PCI Compliance Checklist

32-bit zero wait state master

132 MBps burst DMA rate

32-bit slave

128 byte FIFO

PCI Master

Zero wait states

Memory cycles only

Burst size selections:

64, 32, 16, 8, 4 (Tx)

64, 48, 32, 16, 8, 4 (Rx, On-board) 48, 32, 16, 8, 4 (Rx, Cell-FIFO)

Memory read line support

Memory read multiple support

Memory write and invalidate

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3Com 3C971-F manual Specifications, Hardware, Memory, Bus Interface, PCI Master