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Agilent Technologies E1563A, E1564A user manual SRE and *SRE?, Stb?

Models: E1563A E1564A

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SRE and SRE?

Parameters

Comments

*STB?

*SRE <unmask> specifies which bits of the Status Byte Register are enabled (unmasked) to generate an IEEE-488.1 service request. Event and summary bits are always set and cleared in the Status Byte Register regardless of the <unmask> value. A "1" in a bit position enables service request generation when the corresponding Status Byte Register bit is set and a “0” disables it. For example, *SRE 16 enables a service request on Message Available bit (bit 4).

unmask is the sum of the decimal weights of the bits to be enabled allowing these bits to pass through to the summary bit RQS (bit 6 in the Status Byte Register). *SRE? returns the current enable <unmask> value.

Name	Type	Range of Values	Default Value

unmask	numeric	0 through 255	None

Executable when initiated: YES

Coupled command: NO

Reset (*RST) condition: unaffected

Power-On condition: no bits are enabled

*STB? returns the value of the Status Byte Register. The RQS bit (bit 6 in the Status Byte Register having decimal weight 64) is set if a service request is pending.

Comments Executable when initiated: YES

Coupled command: NO

Related commands: *SRE

Reset (*RST) condition: none

Chapter 3

Digitizers Command Reference 113

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Agilent Technologies E1563A, E1564A user manual SRE and *SRE?, Stb?

Contents

Manual Part Number E1563-90004 Page Contents Scpi Command Reference Status System Registers 119 145 169 Government Restricted Rights Duration of Warranty 3 yearsDocumentation History Safety SymbolsModel Number E1563A/E1564A SafetyConforms with the following product standards EMCStandard LimitPage Chapter Configuring the Digitizer Modules Using This ChapterChapter Digitizers DescriptionRange Voltage Input Condition Vmax Front Panel FeaturesConfiguring the Digitizer Modules Chapter External Trigger Input Front Panel IndicatorsUser Input Terminals External Trigger Input/Calibration Bus Output Page Configuring the Digitizer Modules Chapter Adding RAM to the Module Configuring the DigitizersRAM Installation Procedure Setting the Logical Address Switch Installing Digitizer in a Mainframe User Cabling Considerations Input Terminal Port Connector CablesWire gauge Belden cable P/N Alpha cable P/N Trigger Input Port Cables Wire and 2-Wire Input Cabling ConsiderationsDigitizer Input Model Digitizer Input Model Three-Wire Connections10. Example Three-Wire Connections Voltage Measurements Step Cable Connector AssemblyConfiguring the Digitizer Modules Chapter Cable Coupling Cable Clamp Boot Connector Ring Housing Example Initial Operation Initial OperationChapter Configuring the Digitizer Modules Configuring the Digitizer Modules Chapter Digitizers Operation Digitizer Block DiagramLimit and Level Comparison Channel Block DiagramQuery Last Reading current value Power-on/Reset States Pre-Trigger Post-Trigger Block DiagramPower-on and Reset States Chapter Using the DigitizersInput Overload Condition Using the Digitizers ChapterTriggering the Digitizers Using Internal TriggeringMaster-Slave Synchronization Using External TriggeringMaster-Slave Operation Trigger Sources for Master-Slave Modes Example Master Module ConfigurationMASTer-SLAVe Trigger SourcesMASTer Sample Signal Example Slave Module ConfigurationSLAVe Sample Signal Introduction Digitizers Application ExamplesProgramming RequirementsMaking Digitizer Measurements Example Sampling Using Immediate TriggeringExample Triggering Using Internal Level Trigsour EXT TRIGLEV1 Trigslop POS Init Example Triggering Using ExternalChapter Digitizers Command Reference Command TypesCommon Commands Format Type Explanations and Examples Abbreviated Commands Implied Commands ParametersDigitizers Command Reference Chapter Are not sent to the instrument. If you do not specify a Scpi Command ReferenceSubsystem Syntax Comments Reset *RST Condition NoneABORt Subsystem Syntax CALCulatechannel CALCulateCALCulateLIMitFAIL? Parameters Comments CALCulateLIMitLOWerDATACALCulateLIMitLOWerDATA? Reset *RST Condition OFF Comments Executable When Initiated YESCALCulateLIMitLOWerSTATe CALCulateLIMitLOWerSTATe?Reset *RST Condition +252 Volts Name Type Range Values Default ValueCALCulatechannelLIMitUPPerSTATe OFF 0 on 1 enables CALCulateLIMitUPPerDATA?CALCulateLIMitUPPerSTATe? CALibrationDACVOLTage CALibrationSubsystem Syntax CALibration ±0.061256409 ±15.00CALibrationDATA? CALibrationDACVOLTage?CALibrationGAIN CALibrationGAINchannel readingsDEF,rateDEF,ON1OFF0Digitizers Command Reference Chapter Voltage Range Max DC Voltage absolute value CALibrationSOURceCALibrationSTATe? CALibrationSOURce?CALibrationSTATe CALibrationSTORe Name Type Range of Values Default ValueCALibrationVALue ±0.061256409 ±15.6800 VoltsCALibrationZERO Executable when initiated no Coupled Command noCALibrationVALue? CALibrationZEROALL? Steps Before Executing a Zero Calibration Subsystem Syntax DIAGnostic DIAGnosticDIAGnosticDACGAIN +2.5 DIAGnosticDACOFFSetDIAGnosticDACOFFSetRAMP 15.0 to +15.0 DIAGnosticDACSOURceDIAGnosticDACSOURceRAMP DIAGnosticMEMorySIZE DIAGnosticINTerruptLINEDIAGnosticINTerruptLINE? RAM Industry Notation Actual Size Value DIAGnosticMEMorySIZE?DIAGnosticPEEK? Regnumber Register Description base + register offset DIAGnosticPOKE DIAGnosticSHORt? DIAGnosticSHORtDIAGnosticSTATus? Bit Event Represented When Bit is HighChapter Digitizers Command Reference FORMat Reset *RST Condition FORMatDATA ASCiiFORMatDATA FORMatDATA?INITiateCONTinuous INITiateSubsystem Syntax INITiate Determining Measurement Complete Status INITIMMediateINITiateIMMediate INITiateCONTinuous?INPutFILTerLPASsFREQ INPutINPutFILTerLPASsFREQ? Subsystem SyntaxINPutFILTerLPASsSTATe Executable When Intitiated no Coupled Command noINPutFILTerLPASsSTATe? INPutSTATeOUTPut Executable when initiated no Coupled Command YESOUTputTTLTnSOURce OUTPutTTLTnSOURce?OUTPutTTLTnSTATe? OUTPutTTLTnSTATeSubsystem Syntax SAMPle SAMPleSAMPleCOUNt SAMPleIMMediate SAMPleCOUNt?SAMPLePRETriggerCOUNt E1563A 2-channel E1564A 4-channel Memory SizeSAMPlePRETriggerCOUNt? SAMPleSOURce SAMPleSLOPeSAMPleSLOPe? SAMPleSOURce? Name Type Point of Source DefaultReset *RST condition 0.0000013 1.3 msec SAMPleTIMerSAMPleTIMer? SENSeDATA? SENSeDigitizers Command Reference Chapter SENSeDATAALL? SENSeDATACVTable? SENSeDATACOUNt?9E3 Hz to 30E6 Hz SENSeROSCillatorEXTernalFREQuencySENSeROSCillatorEXTernalFREQuency? SENSeROSCillatorSOURce? SENSeROSCillatorSOURCeSENSeSWEepOFFSetPOINts? SENSeSWEepOFFSetPOINtsSENSeSWEepPOINts SENSeSWEepPOINts?Voltage Range Resolution SENSeVOLTagechannelDCRESolution?SENSeVOLTagechannelDCRANGe SENSeVOLTagechannelDCRANGe?Status System Registers STATusSubsystem Syntax STATus Bit # DescriptionDigitizers Command Reference Chapter STATusOPERationCONDition? STATusOPERationENABleSTATusOPERationENABle? STATusQUEStionableENABle STATusPRESetSTATusQUEStionableENABle? STATusOPERationEVENt?SYSTemVERSion? SYSTemERRor?SYSTem Subsystem Syntax Test TESTERRor?TESTNUMBer? Testnumber Digitizers Command Reference Chapter Test requires an E1564A 4-Channel Digitizer Bit # TESTTSTRESults? TRIGgerIMMediate TRIGgerTRIGgerLEVel Subsystem Syntax TRIGgerTRIGgerMODE Reset *RST condition 0.00 on all channelsTRIGgerLEVel? Executable when initiated YES MASTer Mode SLAVe Mode Sample line Trigger lineTRIGgerMODE? TRIGgerSLOPenTRIGgerSOURcen BUS EXTernal Hold IMMediate INTernal1-4 TRIGgerSLOPen?TRIGgerSOURcen TRIGgerSOURcen? Category Command Title Description Ieee 488.2 Common Commands Quick ReferenceNumeric Through None ESE and *ESE?ESR? OPC? STB? SRE and *SRE?TST? Command Description Scpi Commands Quick ReferenceDATA? Rdgsperchannel,channellist Test Digitizers Command Reference Chapter Appendix a Appendix a Digitizers SpecificationsNumber of channels Selectable input filters 2-pole Bessel Timing Memory/TriggeringDigitizers Specifications Appendix a About This Appendix Appendix BRegister Programming vs. Scpi Programming Addressing the RegistersRegister-Based Programming Appendix B Base AddressFigure B-1. Registers Within A16 Address Space Description Address Register DescriptionsSamples Taken High Word Register Reading the Register Device Type RegisterStatus/Control Register Read Bits Status/Control Register Write Bits Status/Control RegisterFifo High Word/Low Word Registers A24 Offset RegisterWrite Bits A24 Offset Register Read Bits A24 Offset RegisterAppendix B Register-Based Programming 129 Interrupt Control RegisterWrite Bits Interrupt Control Register Read Bits Interrupt Control RegisterCVTable Channel 1 Register Interrupt Source RegisterCVTable Channel 2 Register Read Bits Interrupt Source RegisterCVTable Channel 4 Register CVTable Channel 3 RegisterSamples Taken High Byte Register Calibration Flash ROM Address RegisterCalibration Source Register Calibration Flash ROM Data RegisterCache Count Register Write Bits Calibration Source RegisterRange, Filter, Channel 3 Connect Register Range, Filter, Channel 1 Connect RegisterWRITE/**READ Bits Trigger/Interrupt Level Channel 1 Register Trigger/Interrupt Level Channel RegisterWRITE/**READ Bits Trigger/Interrupt Level Channel 2 Register Pre-Trigger Count High Byte Register Byte RegisterWord Register Low Word Register Pre-Trigger CountSample Count High Byte Register Sample Count Low Word RegisterRead Bits Trigger Control Register Source/Control RegisterWrite Bits Trigger Source Register Exsample Write Bits Sample Source RegisterProgramming Examples Read ID and Device Type Registers Beginning of ProgramProgram Main Make some measurements and retrieve readings Read Status RegisterReset Function Wait Function Appendix C Digitizers Error Messages Execution ErrorsAppendix C Number Title DescriptionEXT Digitizers Error Messages Appendix CCALC2LIMUPPSTAT on Command string. Example *IDN?SYSTVERS? Calibration Errors Self-Test ErrorsGain Non-converging error Zero Calibration Gain CalibrationDigitizers Error Messages Appendix C Introduction Appendix DTypes of Tests Recommended Test EquipmentPerformance Verification Test Programs Test ConditionsRecording Your Test Results Digitizers Verification Tests Appendix DExample Self-Test Functional Test ProcedureFunctional Verification Test Performance Verification Tests E1563A Error from E1564A Range NominalZero Offset Verification Test Table D-2. Zero Offset Verification Test PointsTable D-3. Noise Verification Test Points E1563A Error from zero E1564A RangeNoise Verification Test Table D-4. Gain Verification Test Points E1563A Error from nominal E1564A RangeGain Verification Test Table D-5. Filter Bandwidth Verification Test Points Error from input valueFilter Bandwidth Verification Test Test Accuracy Ratio TAR Performance Test RecordMeasurement Uncertainty Test Conditions Ambient TemperatureoCGeneral Information H3 H4 E1563A 2-Channel Digitizer E1564A 4-Channel DigitizerZero Offset Test Gain TestLimit Uncert Accuracy Ratio Test Digitizer Low Measured High Input Range LimitReading E1563A 25 kHz Filter Bandwidth TestDigitizers Verification Tests Appendix D Closed-Cover Electronic Calibration Appendix E Digitizers AdjustmentsAppendix E Digitizers Adjustments Appendix E Adjustment ProceduresAdjustment Conditions General Procedure Zero Adjustment E1563A Gain Adjustment E1564A Gain Adjustment Digitizers Adjustments Appendix E Index IndexIndex Index Index Index