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Calibration Flash ROM Data Register
This register holds the data of the calibration flash ROM that is used for the calibration constants. The upper eight bits return “0” when this register is read. Note the bit pattern 01010 for bits
base + 1E16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Write* | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
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Read** | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
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Calibration Source Register
The E1564A
base + 2016 | 15 |
| 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 |
| 5 | 4 | 3 | 2 |
| 1 | 0 | |
Write | RANGE |
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| MUX1 | MUX0 |
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| DAC Data |
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| *WRITE BITS (Calibration Source Register) |
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bits |
| DAC |
| DAC data |
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bit 12, 13 |
| MUX0, 1 | connects choices to the output; 00 = CAL source, 01 = Raw DAC output, |
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| 10 = Internal +5V reference, 11 = Input short |
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bit 15 |
| RANGE | DAC output ranges: 0 = ±15V DAC output, 1 = ±0.5V DAC output |
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Cache Count Register
The total number of samples taken by the digitizer is the ((cache count x 2) divided by the number of channels) + the sample count (registers at offset 1816 and 1A16).
base + 2216 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Write | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
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| Cache count |
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132 | Appendix B |