Agilent Technologies HDMP-3001 Chip setup and configuration Eeprom Detection, SDH and Sonet mode

Models: HDMP-3001

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4. Application Information

4.1 Chip setup and configuration

4.1.1 EEPROM Detection

After reset, HDMP-3001 will probe the SDA pin. If tied to ground, no boot EEPROM is present and nor- mal operation will resume. If connected to an EEPROM, SDA is pulled high by an internal resistor and HDMP-3001 will start to load its configuration from the EEPROM. During this time, HDMP-3001 will not respond to any transactions on the micropro- cessor or MII Management ports.

4.2 Configurations

4.2.1 PHY and MAC mode

The HDMP-3001 can operate in either PHY mode or MAC mode. In PHY mode the MII interface is designed to connect to an Ethernet MAC and in MAC mode to connect to a PHY. A typical use of the HDMP-3001 in PHY mode is in a port of an Ethernet switch. Here the MII clocks are driven by the HDMP-3001. Examples of MAC mode use are in a standalone DSU/CSU or in an Ethernet port of a SONET ADM. Here the MII clocks are received by the HDMP- 3001. Depending on the mode, the MII pins have different functions and the two MII clocks change direction. After reset, the HDMP-

3001 is defaulted to MAC mode. This is because in MAC mode both MII clocks are inputs so there is no risk of having enabled opposing drivers. The mode is se- lected by writing to an internal register which should only be done after reset and then remain constant.

4.2.2 SDH and SONET mode

After power on reset, HDMP-3001 is defaulted to SONET mode. By setting an internal register, SDH mode can be selected.

SONET is predominantly used in North America, while SDH domi- nates in Europe and Asia.

4.2.3 LAPS and GFP mode

LAPS and GFP are two different standards to map Ethernet frames into a SONET/SDH payload. LAPS is the default mode. The mode is selected by the Chip Mode register. When using GFP mode, other registers need to be programmed to set the desired GFP header option. For instance, for GFP with null headers and FCS enabled these registers should be programmed:

1.Chip Mode = 0x01 (GFP mode)

2.Transmit Control / Type_L = 0x01 (frame-mapped Ethernet)

3.Transmit Rate Adaptation / Type_H = 0x10 (FCS enabled, null header)

4.Transmit GFP Mode = 0x04 (no extended header)

5.Receive ADR / Type_L = 0x01 (frame-mapped Ethernet)

6.Receive Control / Type_H = 0x10 (FCS enabled, null header)

7.Receive GFP Mode = 0xA0 (no extended header)

8.RX-FIFO Transmit Threshold = 0x14, since GFP does not need to buffer data to avoid underrun in the case of many flags in the payload

For further details, see the regis- ter map in Section 5 and the GFP data processing discussion in Section 3.8.2.

4.2.4 INT Pin Configuration

This section specifies the configu- ration of the HDMP-3001 Microprocessor Interrupt pin INT. Table 15 shows the configurations of the pin.

HDMP-3001

SONET

HDMP-3001

 

(PHY MODE)

 

(PHY MODE)

 

 

 

Figure 18. HDMP-3001 connecting to a MAC

HDMP-3001

SONET

HDMP-3001

 

(MAC MODE)

 

(MAC MODE)

 

 

 

Figure 19. HDMP-3001 connecting to a PHY

MII_TCLK

SWITCH WITH

INTEGRATED MACs

MII_RCLK

MII_TCLK

PHY

MII_RCLK

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Agilent Technologies HDMP-3001 manual Chip setup and configuration Eeprom Detection, Configurations PHY and MAC mode

HDMP-3001 specifications

Agilent Technologies, a prominent name in electronics and measurement technology, offers a wide range of products that cater to various industries. Among its notable offerings is the HDMP-3001, a high-speed, serial data transceiver designed to facilitate robust communications in electronic systems. The HDMP-3001 stands out with its ability to handle high bandwidths, making it particularly suited for applications requiring rapid data transfer, such as telecommunications, computer networking, and high-performance computing.

One of the main features of the HDMP-3001 is its advanced signaling technology. By employing differential signaling, the transceiver minimizes electromagnetic interference and enhances signal integrity. This is crucial in environments with multiple electronic devices operating simultaneously, as it ensures data is transmitted clearly and without degradation.

The HDMP-3001 operates at a maximum data rate of 1 Gbps, allowing for efficient data transfer over short distances. This capability is coupled with a flexible architecture that enables users to configure the transceiver for various applications. The device supports both point-to-point and point-to-multipoint configurations, giving engineers the versatility they need in designing communication links.

Moreover, the HDMP-3001 features on-chip clock recovery functionality, which simplifies system design by reducing the number of external components needed. This built-in feature allows the transceiver to maintain synchronization even as data rates increase, further enhancing performance.

The low power consumption characteristic of the HDMP-3001 is another notable advantage. This makes it an attractive choice for battery-operated devices and systems where power efficiency is critical. The transceiver’s design ensures optimal performance while minimizing heat generation and power draw, enabling longer operational lifetimes.

In terms of physical characteristics, the HDMP-3001 comes in a compact, surface-mount package, allowing for easier integration into various circuit board designs. The small form factor, combined with its innovative technology, makes it a popular choice among engineers seeking to improve data transmission reliability without compromising on space or power constraints.

Overall, Agilent Technologies' HDMP-3001 is a formidable solution for high-speed serial data transmission, characterized by its robust performance, low power consumption, and versatile configuration options. With these features, it continues to be an essential component in the evolving landscape of electronic communications.