Table 21. STS-3c/STM-1 configuration for RX_FRAME_POSITION [3:0]

 

 

 

 

Data on RX_DATA[7:0]

 

RX_FRAME_POSITION[3:0]

 

 

 

 

 

 

 

 

 

 

 

 

 

last byte of frame

 

0000

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

first A1 byte

 

0001

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

second A1 byte

 

0010

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

third A1 byte

 

0011

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

first A2 byte

 

0100

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

second A2 byte

 

0101

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

third A2 byte

 

0110

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

J0 byte

 

 

0111

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

first Z0 byte

 

1000

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

last Z0 byte

 

1001

 

 

 

 

 

 

 

 

 

 

 

 

 

 

first byte after last Z0 byte

1010

 

 

 

 

 

 

 

 

 

 

 

 

 

 

second byte after last Z0 byte

1011

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ADDR=0x102: Receive LOH Status

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

 

 

 

 

 

 

 

 

 

Bit name

Reserved

Reserved

RX_LAIS

RX_LRDI

Reserved

K1_UNSTAB

S1_UNSTAB

J0_OOF

 

 

 

 

 

 

 

 

 

R/W

—

—

R

R

—

R

R

R

 

 

 

 

 

 

 

 

 

 

Value

0

0

1

0

0

0

 

0

1

after

 

 

 

 

 

 

 

 

 

reset

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Bits 7-6:

Reserved

 

 

 

 

 

 

 

 

Bit 5:

RX_LAIS: It will be asserted after the three LSBs of the received K2 byte are received as 111 for the

 

number of consecutive frames specified in the K2_CONSEC_NUM [3:0] register. It will be de-

 

asserted after the three LSBs of the received K2 byte are not received as 111 for the number of

 

consecutive frames specified in the K2_CONSEC_NUM [3:0].

 

 

Bit 4: RX_LRDI: It will be asserted after the three LSBs of the received K2 byte are received as 110 for the number of consecutive frames specified in the K2_CONSEC_NUM [3:0] register. It will be de- asserted after the three LSBs of the received K2 byte are not received as 110 for the number of consecutive frames specified in the K2_CONSEC_NUM [3:0].

Bit 3: Reserved

Bit 2: K1_UNSTAB: This bit is used to check for instability for K1 byte. Set if no three consecutive frames are received with identical K1 bytes for 12 successive frames.

Bit 1: S1_UNSTAB: The S1 LSB is checked for instability. If, for 12 successive frames, three consecutive frames are not received with identical S1 LSB in SDH mode, or eight consecutive frames are not received with identical S1 in SONET mode, the S1_UNSTAB bit is asserted. It is deasserted when the required number of identical S1 LSBs are received.

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Agilent Technologies HDMP-3001 manual Rxlais Rxlrdi, K1UNSTAB S1UNSTAB J0OOF
Page 63 Page 65

HDMP-3001 specifications

Agilent Technologies, a prominent name in electronics and measurement technology, offers a wide range of products that cater to various industries. Among its notable offerings is the HDMP-3001, a high-speed, serial data transceiver designed to facilitate robust communications in electronic systems. The HDMP-3001 stands out with its ability to handle high bandwidths, making it particularly suited for applications requiring rapid data transfer, such as telecommunications, computer networking, and high-performance computing.

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Overall, Agilent Technologies' HDMP-3001 is a formidable solution for high-speed serial data transmission, characterized by its robust performance, low power consumption, and versatile configuration options. With these features, it continues to be an essential component in the evolving landscape of electronic communications.
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