2.3 I/O Buffer Types
This section lists the types of some particular I/Os used in the
Table 8. Buffer types
Buffer Type | I/O Name | Comment | |
|
|
| |
O/D | APS_INTB | Need external P/U | |
Output |
|
| |
|
|
| |
TS | P_RXD_M_TXD[0] | Controlled by the “Isolate MII” register bit | |
Output | P_RXD_M_TXD[1] |
| |
| P_RXD_M_TXD[2] |
| |
| P_RXD_M_TXD[3] |
| |
| P_RX_DV_M_TX_EN |
| |
| P_RX_ER_M_TX_ER |
| |
|
|
| |
| INT | See INT Pin Configuration Section | |
|
|
| |
| RDYB | Uses a T/S output buffer and logically drives high before output buffer is | |
|
| released or tristated | |
|
|
| |
Input | TMS, TRSTB, TDI |
| |
w/ |
|
| |
Internal P/U |
|
| |
|
|
| |
Bidirectional | P_TX_CLK_M_RX_CLK |
| |
w/ |
|
| |
P_RX_CLK_M_TX_CLK |
| ||
Internal P/U |
| ||
for input | SDA | P/U can be disabled if there is an external P/U | |
mode | |||
|
| ||
SCL |
| ||
|
| ||
|
|
| |
| GPIO [15:0] |
| |
|
|
|
Note:
All of the internal P/Us are normally enabled, and they can be disabled through the JTAG port, with the exception of SCL and SDA. The pullups on these two pins can be disabled using controls from register 0x003 bits [5:4].
16