PRELIMINARY
TECHNICAL
DATA
PRELIMINARY
TECHNICAL
DATA
This information applies to a product under development. Its characteristics and specifications are subject to change with-
out notice. Analog Devices assumes no obligation regarding future manufacturing unless otherwise agreed to in writing. 11REV. PrA
For current information contact Analog Devices at (781) 461-3881 ADSP-2192October 2000
Target accesses to registers and DSP memory can go
through any function. As long as the Memory Space access
enable bit is set in that function, then PCI memory accesses
whose addresses match the locations programmed into a
function, BARs 1-3 will be able to read or write any visible
register or memory location within the ADSP-2192. Simi-
larly, if IO Space access enable is set, then PCI I/O accesses
can be performed via BAR4.
Within the Power Management section of the configuration
blocks, there are a few interactions. The part will stay in the
highest power state between the three configurations.
Table 7. PCI Configuration Space 0, 1, and 2
Address Name Reset Comments
0x01-
0x00 Vendor ID 0x11D4 Writable from the DSP during initialization
0x03-
0x02 Config 0 Device ID 0x2192 Writable from the DSP during initialization
Config 1 Device ID 0x219A Writable from the DSP during initialization
Config 2 Device ID 0x219E Writable from the DSP during initialization
0x05-
0x04 Command Register 0x0 Bus Master, Memory Space Capable, I/O
Space Capable
0x07-
0x06 Status Register 0x0 Bits enabled: Capabilities List, Fast B2B,
Medium Decode
0x08 Revision ID 0x0 Writable from the DSP during initialization
0x0B-
0x09 Class Code 0x48000 Writable from the DSP during initialization
0x0C Cache Line Si ze 0x0 Read-only
0x0D Latenc y Timer 0x0
0x0E Header Type 0x80 Multifunction bit set
0x0F BIST 0x0 Unimplemented
0x13-
0x10 Base Address1 0x08 Register Access for all ADSP-2192 Registers,
Prefetchable Memory
0x17-
0x14 Base Address2 0x08 24-bit DSP Memory Access
0x1B-
0x18 Base Address3 0x08 16-bit DSP Memory Access
0x1F-
0x1C Base Address4 0x01 I/O access for control registers and DSP
memory
0x23-
0x20 Base Address5 0x0 Unimplemented
0x27-
0x24 Base Address6 0x0 Unimplemented
0x2B- 0x28 Config 0 Cardbus CIS Pointer 0x1FF03 CIS RAM Pointer - Function 0 (Read Only).
Config 1 Cardbus CIS Pointer 0x1FE03 CIS RAM Pointer - Funct ion 1 (Read Only).
Config 2 Cardbus CIS Pointer 0x1FD03 CIS RAM Pointer - Function 2 (Read Only).