Analog Devices ADSP-2192 0x0-0x3 DSP Memory Buffer Base Addr, 0x4-0x5 DSP Memory Buffer Size

Models: ADSP-2192

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For current information contact Analog Devices at (781) 461-3881

 

 

 

 

October 2000

ADSP-2192

 

 

 

 

 

 

 

 

 

 

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16-bit PCIIDSP I/O Memory Map (BAR4)

 

 

 

 

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PCI Base Address Register (BAR 4) allows indirect access

 

 

 

 

 

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to the ADSP-2192 Control Registers and DSP Memory.

 

 

 

 

 

 

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The DSP Memory Indirect Access Registers accessible

 

 

 

 

from BAR4 are as follows:

 

 

 

 

 

 

Table 10. 16-bit PCI DSP I/O Space Indirect Access Registers Map (BAR 4 Mode)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Offset

 

 

Name

 

Reset

Comments

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0x03-0x00

 

Control Register Address

0x0000

Address and direction control for registers accesses

 

 

 

 

 

 

 

 

 

 

 

 

0x07-0x04

 

Control Register Data

0x0000

Data for register accesses

 

 

 

 

 

 

 

 

 

 

 

 

0x0B-0x08

 

DSP Memory Address

0x000000

Address and Direction control for Indirect DSP

 

 

 

 

 

 

 

 

 

 

memory accesses

 

 

 

 

 

 

 

 

 

 

 

 

 

0x0F-0x0C

 

DSP Memory Data

0x000000

Data for DSP memory accesses

 

 

 

 

 

 

 

 

 

 

 

 

 

DSP P0 Memory Indirect Address Space occupies PCI BAR4 Space 0x000000 -> 0x01FFFF

DSP P1 Memory Indirect Address Space occupies PCI BAR4 Space 0x020000 -> 0x03FFFF

All Indirect DSP Memory Accesses are 24-bit or 16-bit Word Accesses.

Using the USB Interface

The ADSP-2192 USB design enables the ADSP-2192 to be configured and attached to a single device with multiple interfaces and various endpoint configurations, as follows:

1.Programmable descriptors and a class-specific com- mand interpreter are accessible through the USB 8052 registers. An 8052-compatible MCU is supported on-board, to enable soft downloading of different con- figurations, and support of standard or class-specific commands.

2.A total of 8 user-defined endpoints are provided. End- points can be configured as BULK, ISO, or INT, and can be grouped

USB DSP Register Definitions

For each endpoint, four registers are defined to provide a memory buffer in the DSP. These registers are defined for each endpoint shared by all defined interfaces, for a total of 4x8 = 32 registers. These registers are read/write by the DSP only.

Table 11. USB DSP Register Definitions

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REV. PrA

Address

Name

 

Comment

 

 

0x0-0x3

DSP Memory Buffer Base Addr

 

EP4

 

 

 

 

 

 

0x4-0x5

DSP Memory Buffer Size

 

EP4

 

 

 

 

 

 

0x6-0x7

DSP Memory Buffer RD Offset

 

EP4

 

 

 

 

 

 

0x8-0x9

DSP Memory Buffer WR Offset

 

EP4

 

 

 

 

 

 

0x10-0x13

DSP Memory Buffer Base Addr

 

EP5

 

 

 

 

 

 

0x14-0x15

DSP Memory Buffer Size

 

EP5

 

 

 

 

 

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0x16-0x17

DSP Memory Buffer RD Offset

 

EP5

 

 

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This information applies to a product under development. Its characteristics and specifications are subjectPto change with-

 

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out notice. Analog Devices assumes no obligation regarding future manufacturing unless otherwise agreed toEin writing.

 

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Analog Devices ADSP-2192 specifications 0x0-0x3 DSP Memory Buffer Base Addr, 0x4-0x5 DSP Memory Buffer Size