Analog Devices ADSP-2192 Figure 8. ADSP-2192 External Crystal Connections, Figure 9. ADSP-2192 Clock Domains, ADSP-2192

PRELIMINARY
TECHNICAL
DATA
PRELIMINARY
TECHNICAL
DATA
This information applies to a product under development. Its characteristics and specifications are subject to change with-
out notice. Analog Devices assumes no obligation regarding future manufacturing unless otherwise agreed to in writing. 33REV. PrA
For current information contact Analog Devices at (781) 461-3881 ADSP-2192October 2000
manufacturer. A parallel-resonant, fundamental frequency,
microprocessor-grade 24.576 MHz crystal should be used
for this configuration.
Figure 8. ADSP-2192 External Crystal Connections
XTALI XTALO
ADSP-2192
CLKRUN
PORST
BUS0
BUS1
CLKSEL
BITCLK
24.576 MHz
CLK
RST
BUS SELECT
POWER ON RESET
(NO CONNEC T)
PCI CLOCK RUN
PCI CLOCK
PCI RESET
AC'97 BIT CLOCK
Figure 9. ADSP-2192 Clock Domains
DSP
CLOCK DOMAIN
X6
PLL
X4
PLL
USB
CLOCK
DOMAIN
24.576MHZ
XTALI
147.456MHZ
1/8.192 PLL &
CLOCK RECOVERY
12.0MHZ
1/2
BITCLK
AC’97
CLOCK DOMAIN
USB PORT
1/2 PERIPHERAL DEVICE
CONTROL BUS
CLOCK DOMAIN
12.288MHZ
PCI
CLOCK
DOMAIN
33MHZ
PCI CLK
1/2 49.152MHZ
49.152MHZ
(SUB-ISA MOD E )
(PROGRAMMABLE)