PRELIMINARY
TECHNICAL
DATA
PRELIMINARY
TECHNICAL
DATA
This information applies to a product under development. Its characteristics and specifications are subject to change with-
out notice. Analog Devices assumes no obligation regarding future manufacturing unless otherwise agreed to in writing. 35REV. PrA
For current information contact Analog Devices at (781) 461-3881 ADSP-2192October 2000
nector (a 2 row × 7 pin strip header) such as that sh own in
Figure10 on page 35. The emulator probe plugs directly
onto this connector for chip-o n-board emulation. You must
add this connector to your target board design if you intend
to use the ADSP-2192 emulator. The total trace length
between the emulator connector and the furthest device
sharing the emulation JTAG pins should be limited to 15
inches maximum for guaranteed operation. This length
restriction must include emulat ion JTAG signals which are
routed to one or more ADSP-2192 devices, or a combina-
tion of ADSP-2192 devices and other JTAG devices on the
chain.
The 14-pin, 2-row pin strip head er is keyed at the pin 3
location; pin 3 must be removed from the header. The pins
must be 0.025 inch square and at least 0.20 inch in length.
Pin spacing should be0.1 ×0.1 inches. Pin strip headers
are available from vendors such as 3M, McKenzie and
Samtec.
The BTMS, BTCK, BTRST and BTDI signals are pro-
vided so the test access port can also be used for board-level
testing. When the connector is not being used for emula-
tion, place jumpers between the Bxxx pins and the xxx pins.
If the test access port will not be used for board testing, tie
BTRST and BTCK pins to GND. The TRST pin must be
asserted after power-up (through BTRST on the connec-
tor) or held low for proper operation of the ADSP-2192.
None of the Bxxx pins (Pins5, 7, 9, 11) are connected on
the emulator probe.
The JTAG signals are terminated on the emulator probe
as follows:
Figure 11 on page 36 shows JTAG scan path connections
for systems that contain multiple ADSP-2192 processors
To make it easier to evaluate the ADSP-219x DSP family
for your application, Analog De vices sells the ADSP-2192
EZ-KIT Lite™. The ADSP-2192 EZ-KIT Lite provides
developers with a cost-effective method for evaluating of the
ADSP-219x family of DSPs. The EZ-KIT Lite includes an
ADSP-2192 DSP evaluation board and fundamental
debugging software. The evaluation boa rd in this kit con-
tains an ADSP-2192 digital signal processor, Flash
Memory, Audio/Telephony type Codec, breadboard area,
Flag LED, Reset/Interrupt/Flag push buttons, and
ADSP-2192 peripheral port connectors. The peripheral
connectors include a JTAG test and emulation port connec-
tor that supports the Analog Devices emulators and other
connector locations that provide additional evaluation and
interface points to the ADSP-2192 peripheral ports. The
ADSP- 219 2 EZ- KIT Lit e co mes w ith an e val uat ion sui te o f
the VisualDSP++ integrated development environment
with the C/C++ compiler, assembler, and linker that sup-
ports typical debug functions including memory/register
read and write, halt, run, and single step. All software tools
are limited to use with the EZ-KIT Liteproduct.
Figure 10. Target Board Connector For ADSP-2192
Analog Devices Emulator (Jumpers in Place)
TOP VIEW
13 14
11 12
910
9
78
56
34
12
EMU
CLKIN (OPTIONAL)
TMS
TCK
TRST
TDI
TDO
GND
KEY (NO PIN)
BTMS
BTCK
BTRST
BTDI
GND
Table 27. Analog Devices DSP Emulator Probe
Terminations
Signal Termination
TMS Driven through 22 Ω Resistor (16 mA
Driver)
TCK Driven at 10 MHz through 22 Ω Resistor
(16 mA Driver)
TRST Active Low Driven through 22 Ω Resistor
(16 mA Driver) (Pulled Up by On-Chip
20 kΩ Resistor); TRST is driven low until
the emulator probe is turned on by the
emulator at software start-up. After software
start-up, TRST is driven high.
TDI Driven by 22 Ω Resistor (16 mA Driver)
TDO One TTL Load, Split (160/220)
CLKIN One TTL Load, Split (160/220)
EMU Active Low 4.7 kΩ Pull-Up Resistor, One
TTL Load (Open-Drain Output from the
DSP)