Analog Devices ADSP-2192 specifications A35

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For current information contact Analog Devices at (781) 461-3881

ADSP-2192

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October 2000

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The JTAG signals are terminated on the emulator probe

nector (a 2 Irow × 7 pin strip header) such as that shown in

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as follows:

RFigureH10 on page 35. The emulator probe plugs directly

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for chip-on-board emulation. You must

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Table 27. Analog Devices DSP Emulator Probe

add thisDconnector to your target board design if you intend

to use the ADSP-2192 emulator. The total trace length

Terminations

between the emulator connector and the furthest device

Signal

Termination

sharing the emulation JTAG pins should be limited to 15

inches maximum for guaranteed operation. This length

TMS

Driven through 22 Ω Resistor (16 mA

restriction must include emulation JTAG signals which are

Driver)

routed to one or more ADSP-2192 devices, or a combina-

tion of ADSP-2192 devices and other JTAG devices on the

TCK

Driven at 10 MHz through 22 Ω

Resistor

chain.

(16 mA Driver)

The 14-pin, 2-row pin strip header is keyed at the pin 3

Active Low Driven through 22 Ω

Resistor

location; pin 3 must be removed from the header. The pins

TRST

(16 mA Driver) (Pulled Up by On-Chip

must be 0.025 inch square and at least 0.20 inch in length.

20 kΩ Resistor);

is driven low until

Pin spacing should be 0.1 × 0.1 inches. Pin strip headers

TRST

the emulator probe is turned on by the

are available from vendors such as 3M, McKenzie and

emulator at software start-up. After software

Samtec.

start-up,

TRST

is driven high.

The BTMS, BTCK, BTRST and BTDI signals are pro-

vided so the test access port can also be used for board-level

TDI

Driven by 22 Ω Resistor (16 mA Driver)

testing. When the connector is not being used for emula-

TDO

One TTL Load, Split (160/220)

tion, place jumpers between the Bxxx pins and the xxx pins.

If the test access port will not be used for board testing, tie

CLKIN

One TTL Load, Split (160/220)

BTRST and BTCK pins to GND. The TRST pin must be

asserted after power-up (through

on the connec-

Ω

BTRST

EMU

tor) or held low for proper operation of the ADSP-2192.

Active Low 4.7 k Pull-Up Resistor, One

TTL Load (Open-Drain Output from the

None of the Bxxx pins (Pins 5, 7, 9, 11) are connected on

DSP)

the emulator probe.

Figure 11 on page 36 shows JTAG scan path connections

for systems that contain multiple ADSP-2192 processors

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To make it easier to evaluate the ADSP-219x DSP family

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for your application, Analog Devices sells the ADSP-2192

EZ-KIT Lite™. The ADSP-2192 EZ-KIT Lite provides

KE Y (NO PIN )

CLKIN (OP TIO NAL)

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developers with a cost-effective method for evaluating of the

BTM S

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ADSP-219x family of DSPs. The EZ-KIT Lite includes an

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ADSP-2192 DSP evaluation board and fundamental

BTC K

TCK

debugging software. The evaluation board in this kit con-

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tains an ADSP-2192 digital signal processor, Flash

BTRS T

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TRST

Memory, Audio/Telephony type Codec, breadboard area,

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Flag LED, Reset/Interrupt/Flag push buttons, and

BTDI

TDI

ADSP-2192 peripheral port connectors. The peripheral

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connectors include a JTAG test and emulation port connec-

tor that supports the Analog Devices emulators and other

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TOP VIEW

connector locations that provide additional evaluation and

interface points to the ADSP-2192 peripheral ports. The

Figure 10. Target Board Connector For ADSP-2192

ADSP-2192 EZ-KIT Lite comes with an evaluation suite of

the VisualDSP++ integrated development environment

Analog Devices Emulator (Jumpers in Place)

with the C/C++ compiler, assembler, and linker that sup-

ports typical debug functions including memory/register

read and write, halt, run, and single step. All software tools

are limited to use with the EZ-KIT Lite product.

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REV. PrA

This information applies to a product under development. Its characteristics and specifications are subjectPto change with-

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out notice. Analog Devices assumes no obligation regarding future manufacturing unless otherwise agreed toEin writing.

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