PRELIMINARY
TECHNICAL
DATA
PRELIMINARY
TECHNICAL
DATA
For current information contact Analog Devices at (781) 461-3881
ADSP-2192 October 2000
This information applies to a product under development. Its characteristics and specifications are subject to change with-
out notice. Analog Devices assumes no obligation regarding future manufacturing unless otherwise agreed to in writing.
16 REV. PrA
DSP P0 Data RAM Block 3 D[15:8] D[7:0] D[15:8] D[7:0] 0x0001 8000
D[15:8] D[7:0] D[15:8] D[7:0] 0x0001 8004
:
D[15:8] D[7:0] D[15:8] D[7: 0] 0x0001 FFFC
DSP P0 Program RAM Block D[23:16] D[15:8] D[23:16] D[15:8] 0x0002 0000
D[23:16] D[15:8] D[23:16] D[15:8] 0x0002 0004
:
D[23:16] D[15:8] D[23:16] D[15:8] 0x0002 7FFC
DSP P0 Program ROM Block D[23:16] D[15:8] D[23:16] D[15:8] 0x0002 8000
D[23:16] D[15:8] D[23:16] D[15:8] 0x0002 8004
:
D[23:16] D[15:8] D[23:16] D[15:8] 0x0002 9FFC
Reserved Space RESERVED RESERVED RESERVED RESERVED 0x0002 A000
:
RESERVED RESERVED RESERVED RESERVED 0x0003 FFFC
DSP P1 Data RAM Block 0 D[15:8] D[7:0] D[15:8] D[7:0] 0x0004 0000
D[15:8] D[7:0] D[15:8] D[7:0] 0x0004 0004
:
D[15:8] D[7:0] D[15:8] D[ 7:0] 0x0004 7FFC
DSP P1 Data RAM Block 1 D[15:8] D[7:0] D[15:8] D[7:0] 0x0004 8000
D[15:8] D[7:0] D[15:8] D[7:0] 0x0004 8004
:
D[15:8] D[7:0] D[15:8] D[7: 0] 0x0004 FFFC
Reserved Space. RESERVED RESERVED RESERVED RESERVED 0x0005 0 000
:
RESERVED RESERVED RESERVED RESERVED 0x0005 FFFC
DSP P1 Program RAM Block D[23:16] D[15:8] D[23:16] D[15:8] 0x0006 0000
D[23:16] D[15:8] D[23:16] D[15:8] 0x0006 0004
:
D[23:16] D[15:8] D[23:16] D[15:8] 0x0006 7FFC
DSP P1 Program ROM Block D[23:16] D[15:8] D[23:16] D[15:8] 0x0006 8000
D[23:16] D[15:8] D[23:16] D[15:8] 0x0006 8004
:
D[23:16] D[15:8] D[23:16] D[15:8] 0x0006 9FFC
Reserved Space RESERVED RESERVED RESERVED RESERVED 0x0006 A000
:
RESERVED RESERVED RESERVED RESERVED 0x0007 FFFC
Table 9. 16-bit PCI DSP Memory Map (BAR 3 Mode) (Continued)
Block Byte3 Byte2 Byte1 Byte0 Offset