Analog Devices specifications ADSP-2192 can be clocked by a crystal oscillator. If a

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ADSP-2192
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D S P E M E RG E S FRO M ~R E S E T A ND

P R OG RA M FLOW JUM P S TO B O OT R OM

October 2000

LO AD E R K E RN E L R E AD S C RS T P IN S A ND D E TE R M INE S M O DE

O F BO OTIN G ; A LS O P E RFO R M S H OU S E KE E P IN G

O P E RA TION S, S E TTING U P IN TE R RU P TS, E TC .

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D E TE C T S E RIAL E E P R OM

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B US C ON FIG U RA TION

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LO AD S E RIAL E E P R OM C O N FIGU RA TION A ND D ATA P A CK E TS

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AFTE R B O OTIN G IS C OM P LE TE , U S ER

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Figure 6. ADSP-2192 Boot Process Flow
to PCIVAUX and VCTRLVDD will switch off the primary
supply. USB applications may require an external high-effi-	DS P		TAN TALU M	CE R AM IC
ciency switching regulator to generate the 2.5V supply for	INTE R NA L		O R
	CIR CU IT		E LE CTRO LY TIC
the ADSP-2192.				P CI V DD
Low Power Operation	2 .5V @ 500M A	IV D D		3 .0V -> 5 .5V
			10 ∝ F	.1 ∝ F
In addition to supporting the PCI and USB standard’s				ZE TEX
	V CTR LV DD			FZT951
power down modes, the ADSP-2192 supports additional
power down modes for the DSP core’s and peripheral				E X TE RN AL
buses. The power down modes are controlled by the DSP1				C O M P O NE N TS
and DSP2 Interrupt/Powerdown registers.	-			P CI VAU X
Clock Signals	+			3 .0V -> 3 .6V
	VRE F

The ADSP-2192 can be clocked by a crystal oscillator. If a			ZE TEX
			FZT951
crystal oscillator is used, the crystal should be connected
across the XTALI/O pins, with two capacitors connected as		V CTR LA UX									Y
shown in Figure 8 on page 33. Capacitor values are depen-
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dent on crystal type and should be specified by the crystal									A
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		Figure 7. ADSP-2192 2.5V Regulator OptionsI								A
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	This information applies to a product under development. Its characteristics and specifications are subject to changePwith-						CREV. PrA A
	out notice. Analog Devices assumes no obligation regarding future manufacturing unless otherwise agreed to in writing.				E				T
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