Fujitsu F2MC-8FX manual Table B-1 Bus Operation List 8/11, DAS Rolc a Rorc a Movw A, PS Movw PS, a

					APPENDIX B Bus Operation List
Table B-1	Bus Operation List (8/11)
CODE	MNEMONIC	~	Cycle	Address bus	Data bus	RD	WR	RMW
93	MOVW A, @A	3	1	N +2	The following	1	0	0
					following instruction
			2	(A) address	Data (H byte)	1	0	0
			3	(A) +1 address	Data (L byte)	1	0	0
E4	MOVW A, #d16	3	1	N +2	Data (L byte)	1	0	0
E5	MOVW SP, #d16		2	N +3	The following	1	0	0
					instruction
E6	MOVW IX, #d16		3	N +4	The following	1	0	0
					following instruction
E7	MOVW EP, #d16
84	DAA	1	1	N +2	The following	1	0	0
					following instruction
94	DAS
02	ROLC A
03	RORC A
70	MOVW A, PS
71	MOVW PS, A
C8 - CF	INC Ri	3	1	N +2	The following	1	0	1
					following instruction
D8 - DF	DEC Ri		2	Rn address	Data	1	0	1
			3	Rn address	Data	0	1	0
E8 - EF	CALLV #n	7	1	N +2	Data of N +2	1	0	0
			2	Vector address	Vector (H)	1	0	0
			3	Vector address +1	Vector (L)	1	0	0
			4	SP -1	Return address (L)	0	1	0
			5	SP -2	Return address (H)	0	1	0
			6	Address divergence	The following	1	0	0
				ahead	instruction
			7	Address divergence	The following	1	0	0
				ahead +1	following instruction

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