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CHAPTER 2 MEMORY SPACE
2.1CPU Memory Space
All of the data, program, and I/O areas managed by the
■CPU Memory Space
Figure 2.1-1 shows the address configuration of the F2MC-8FX memory space.
The I/O area is located close to the least significant address, and the data area is arranged right above it. The data area can be divided into the register bank, stack and direct areas for each application. In contrast to the I/O area, the program area is located close to the most significant address. The reset, interrupt reset vector and vector call instruction tables are arranged in the highest part.
Figure 2.1-1 F2MC-8FX Memory Space
FFFFH
0000H
Program area
Data area
I/O
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