Fujitsu F2MC-8FX manual Reset Operation

CHAPTER 4 INTERRUPT PROCESSING

4.5Reset Operation

In the F2MC-8FX series, when a reset occurs, the flag of program status is 0 and the IL bit is set to 11. When cleared, the reset operation is executed from the starting address written to set vectors (FFFEH, FFFFH).

■Reset Operation

A reset affects:

•Accumulator, temporary accumulator: Initializes to 0000H

•Stack pointer: Initializes to 0000H

•Extra pointer, index register: Initializes to 0000H

•Program status: Sets flag to 0, sets IL bit to 11, sets RP bit to 00000 and Initializes DP bit to 000

•Program counter: Reset vector values

•RAM (including general-purpose registers): Keeps value before reset

•Resources: Basically stop

•Others: Refer to the manual for each product for the condition of each pin

Refer to the manual for each product for details of the value and operation of each register for special reset conditions.

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